Displaying 7 results from an estimated 7 matches for "tailjmpr".
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tailjmpd
2008 Jan 03
2
[LLVMdev] Tailcall optimization in jit stopped working
...86/X86CodeEmitter.cpp (working copy)
@@ -601,7 +601,8 @@
if (MO.isMachineBasicBlock()) {
emitPCRelativeBlockAddress(MO.getMBB());
} else if (MO.isGlobalAddress()) {
- bool NeedStub = !IsStatic ||
+ bool NeedStub = Opcode == X86::TAILJMPd || Opcode ==
X86::TAILJMPr ||
+ Opcode == X86::TAILJMPm || !IsStatic ||
(Is64BitMode && TM.getCodeModel() == CodeModel::Large);
emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word,
0, 0, NeedStub);
2007 Aug 08
1
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
...o insert code into PEI::saveCalleeSavedRegisters to
detect that there is a tail called function that uses a callee saved
register and move it to another (EAX).
that's how the TAILJMP instruction looks:
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
noResults = 1 in
def TAILJMPr : I<0xFF, MRM4r, (ops GR32:$dst), "jmp {*}$dst #
TAIL CALL jmpr",
[]>;
btw. i am currently working with llvm-2.0 codebase.
thanks for any help
regards arnold
2007 Aug 08
0
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
...ove) the function pointer to (right
before the callee saved register restore) but thinking a little
further that's nonsense.
something like
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
noResults = 1,
ifDestRegisterisCalleeSavedEmitAMoveToECXAndJumpToThat=1
in
def TAILJMPr : I<0xFF, MRM4r, (ops GR32:$dst), "jmp {*}$dst #
TAIL CALL jmpr",
[]>;
On 8 Aug 2007, at 18:27, Dale Johannesen wrote:
> Inserting a pseudo before your tail call that defines all the callee-
> saved
> registers should work. See FP_REG_KILL.
the trick...
2007 Aug 08
4
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
Hello, Arnold.
> Is there a way to indicate that the register the tail call
> instruction uses as destination needs to be valid after the callee
> saved registers have been restored? (some X86InstrInfo.td foo magic
> maybe ?)
It's wrong way to do the things. Because in this case you either violate
the ABI for callee, or you're restricted to do tail call lowering only
for
2007 Aug 09
1
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
...t; before the callee saved register restore) but thinking a little
> further that's nonsense.
>
> something like
> let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
> noResults = 1,
> ifDestRegisterisCalleeSavedEmitAMoveToECXAndJumpToThat=1
> in
> def TAILJMPr : I<0xFF, MRM4r, (ops GR32:$dst), "jmp {*}$dst #
> TAIL CALL jmpr",
> []>;
>
> On 8 Aug 2007, at 18:27, Dale Johannesen wrote:
>> Inserting a pseudo before your tail call that defines all the callee-
>> saved
>> registers should work....
2007 Sep 24
0
[LLVMdev] RFC: Tail call optimization X86
...9;t this function be "static"?
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
+ def TAILJMPd : IBr<0xE9, (ins i32imm:$dst), "jmp\t${dst:call} #
TAILCALL",
+ []>;
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
+ def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l}\t{*}
$dst # TAILCALL",
+ []>;
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in
def TAILJMPm : I<0xFF, MRM4m, (outs), (ins i32mem:$dst),
"jmp\t{*}$dst # TAIL CALL&qu...
2007 Sep 23
2
[LLVMdev] RFC: Tail call optimization X86
The patch is against revision 42247.
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