search for: tailjmping

Displaying 10 results from an estimated 10 matches for "tailjmping".

2008 Jan 03
2
[LLVMdev] Tailcall optimization in jit stopped working
tailcall optimization stop working in jit (lli) in revision 45527. i guess this is because the jit is tailjmping to the wrong function address. the following change would reenable tailcallopt in jit. But i am pretty sure that this is not the correct fix (since i don't really understand what is going on :). maybe evan can comment on this? regards arnold Index: lib/Target/X86/X86CodeEmitter.cpp ====...
2009 Jun 10
3
[LLVMdev] Why does the x86-64 JIT emit stubs for external calls?
In X86CodeGen.cpp, the following code appears in the handler used for CALL64pcrel32 instructions: // Assume undefined functions may be outside the Small codespace. bool NeedStub = (Is64BitMode && (TM.getCodeModel() == CodeModel::Large || TM.getSubtarget<X86Subtarget>().isTargetDarwin())) || Opcode == X86::TAILJMPd;
2009 Jun 11
0
[LLVMdev] Why does the x86-64 JIT emit stubs for external calls?
On Jun 10, 2009, at 12:17 PM, Jeffrey Yasskin wrote: > In X86CodeGen.cpp, the following code appears in the handler used for > CALL64pcrel32 instructions: > > // Assume undefined functions may be outside the Small > codespace. > bool NeedStub = > (Is64BitMode && > (TM.getCodeModel() == CodeModel::Large || >
2009 Jun 11
1
[LLVMdev] [unladen-swallow] Re: Why does the x86-64 JIT emit stubs for external calls?
On Thu, Jun 11, 2009 at 12:54 PM, Evan Cheng<evan.cheng at apple.com> wrote: > > > > On Jun 10, 2009, at 12:17 PM, Jeffrey Yasskin wrote: > >> In X86CodeGen.cpp, the following code appears in the handler used for >> CALL64pcrel32 instructions: >> >>       // Assume undefined functions may be outside the Small codespace. >>       bool NeedStub =
2010 Oct 20
0
[LLVMdev] llvm register reload/spilling around calls
On Oct 20, 2010, at 11:53 AM, Dan Gohman wrote: > > On Oct 19, 2010, at 8:00 PM, Jakob Stoklund Olesen wrote: >> >> >> One problem is that calling conventions are handled while building the selection DAG, and the DAG doesn't really know to represent clobbered registers. >> >> Perhaps X86TargetLowering::LowerCall() could decorate the X86ISD::CALL node
2010 Nov 25
2
[LLVMdev] Is the Win64 codegen issue fixed?
Great! Are there other issues I should be aware of? Félix Le 2010-11-25 à 07:43:23, Anton Korobeynikov a écrit : > Hello Felix > >> I have a project in mind that involves using the JIT for a few targets (x86 >> and x86_64 processors on Mac OS, Linux and Windows). However, there is an >> open bug that says LLVM generates incorrect code for Win64. >> Eli's last
2010 Dec 10
0
[LLVMdev] Is the Win64 codegen issue fixed?
Felix, > Great! Are there other issues I should be aware of? There might be some issues wrt tailcalls, but I'd not expect anything else to be major broken. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
2007 Aug 08
1
[LLVMdev] Destination register needs to be valid after callee saved register restore when tail calling
Hello list, i am currently trying to implement tail call optimization in the X86 backend , so far i have it working for cases (modulo many unknown bugs :) where the tail called function is a destination within the source file and frame pointer elimination is performed. i implemented it as a dagcombiner transformation running in post legalized phase within the
2010 Oct 20
4
[LLVMdev] llvm register reload/spilling around calls
On Oct 19, 2010, at 8:00 PM, Jakob Stoklund Olesen wrote: > > > One problem is that calling conventions are handled while building the selection DAG, and the DAG doesn't really know to represent clobbered registers. > > Perhaps X86TargetLowering::LowerCall() could decorate the X86ISD::CALL node with the calling convention somehow? > > Dan, do you have any thoughts on
2019 Aug 03
3
Manually insert an instruction in SelectionDAG
Hello, I am trying to insert a .byte/.word in the beginning of a specific LLVM IR instruction when it prints out in assembly (the inserted ‘instruction' only appears in assembly, not in LLVM IR), and I am guessing the best way to do that is to insert it in SelectionDAG as it strips down some LLVM IR instructions when it’s lowered. Can I get some guidance on what function I should use to insert