search for: tailcallee

Hello, While investigating one of the existing tests (test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces some interesting code. The IR is very straightforward: define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { entry: ret i32 %a3 } define fastcc i32 @tailcaller(i32 %in1, i32 %in2) { entry: %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 %in1, i32 %in2) ret i32 %tmp11 } define i32 @foo(i32 %in1, i32 %in2) { entry: %q = call fastcc i32 @tailcaller...

...at 5:45 PM, Eli Bendersky <eliben at google.com> wrote: > Hello, > > While investigating one of the existing tests > (test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces some > interesting code. The IR is very straightforward: > > define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 > %a4) { > entry: > ret i32 %a3 > } > > define fastcc i32 @tailcaller(i32 %in1, i32 %in2) { > entry: > %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 > %in1, i32 %in2) > ret i32 %tmp11 > } > > define i32 @foo(...

>> While investigating one of the existing tests >> (test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces some >> interesting code. The IR is very straightforward: >> >> define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 >> %a4) { >> entry: >> ret i32 %a3 >> } >> >> define fastcc i32 @tailcaller(i32 %in1, i32 %in2) { >> entry: >> %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32 >> %in1, i32 %in2) >> ret i32...

...able -tailcallopt you get support for tail calls between functions with arbitrary stack space requirements. That means the calling convention has to change slightly. E.g the callee is responsible for removing it's arguments of the stack. The caller cannot transitively know the tail callee's tailcallee's requirement. Also care must be taken to make sure the stack stays aligned. On Feb 14, 2013, at 4:45 PM, Eli Bendersky <eliben at google.com> wrote: > Hello, > > While investigating one of the existing tests > (test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces...

...able -tailcallopt you get support for tail calls between functions with arbitrary stack space requirements. That means the calling convention has to change slightly. E.g the callee is responsible for removing it's arguments of the stack. The caller cannot transitively know the tail callee's tailcallee's requirement. Also care must be taken to make sure the stack stays aligned. > Let me translate this to another phrasing to check my own understanding: w.r.t. foo calling talcaller. Since tailcaller is fastcc, when we generate code for it, we assume that the caller has allocated the require...

...available registers in callingconvention for argument passing?) 2.)lowering of the call: *if it can be shown that call really is tail call (next instruction is a return): -move the arguments to the correct position on the stack -create a REALTAILCALL SelDAG node holding tailcallee : if the tailcallee is dynamic, not a TargetGlobalAddress or the like, lower a move CALL_CLOBBERED_REG tailcallee instruction else attach a TargetGlobalAddress or the like -the size of the stack adjustment the realtailcall would be a no op operation that makes sure...

Consider this program: @globalSideEffect = global i32 0 define void @tobeinlined() #0 { entry: store i32 3, i32* @globalSideEffect, align 4 musttail call fastcc void @tailcallee(i32 3) ret void } define fastcc void @tailcallee(i32 %i) { entry: call void @tobeinlined() ret void } attributes #0 = { alwaysinline } Clearly, if this is processed with opt -alwaysinline, it will lead to a correct tail call since the call to "tobeinlined" will be inlined....

...+ callee is in the same module as caller + callee has // visibility protected or hidden an (pointless) example would be: <<---tailcall.ll --->> @.str = internal constant [12 x i8] c"result: %d\0A\00" ; <[12 x i8] *> [#uses=1] define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { entry: ret i32 %a3 } define fastcc i32 @tailcaller(i32 %in1, i32 %in2) { entry: %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 % in2, i32 %in1, i32 %in2 ) ; <i32> [#uses=1] ret i32 %tmp11 } define i3...

..., tail call opt is enabled, tail position, TODO: check for PIC code). If it is okay to do tco it calculates the stack adjustment. Repositions the return address, Puts the arguments on the correct position relative to the (virtual) frame pointer. Moves the function address to register ECX if the tailcallee is in a register. (TODO: set ECX as live out?) TODO: check what to do with pic code Adds register arguments (EAX, EDX) as live in if they are used for arguments. Create a TAILCALL node (a pseudo instruction) holding the Callee (Register or TargetGlobalAddress/ExternalSymbol), the stack adju...

Hello, Arnold. Only quick comments, I'll try to make a full review a little bit later. > 0.)a fast calling convention (maybe use the current > CallingConv::Fast, or create a CallingConv::TailCall) > 1.) lowering of formal arguments > like for example x86_LowerCCCArguments in stdcall mode > we need to make sure that later mentioned CALL_CLOBBERED_REG is >

...abled, tail position, TODO: check for PIC code). > If it is okay to do tco it calculates the stack adjustment. > Repositions the return address, > Puts the arguments on the correct position relative to the (virtual) > frame pointer. > Moves the function address to register ECX if the tailcallee is in a > register. (TODO: set ECX as live out?) > TODO: check what to do with pic code > Adds register arguments (EAX, EDX) as live in if they are used for > arguments. > Create a TAILCALL node (a pseudo instruction) holding the Callee > (Register or TargetGlobalAddress/ExternalS...

...lee has > // visibility protected or hidden > > > an (pointless) example would be: > > > <<---tailcall.ll --->> > @.str = internal constant [12 x i8] c"result: %d\0A\00" ; <[12 x i8] > *> [#uses=1] > > define fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { > entry: > ret i32 %a3 > } > > define fastcc i32 @tailcaller(i32 %in1, i32 %in2) { > entry: > %tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 % > in2, i32 %in1, > i32 %in2 ) ; <i32> [#uses=1...

Hi Jo, On 2007-12-24, at 14:43, Joachim Durchholz wrote: > I'm in a very preliminary phase of a language project which requires > some specific optimizations to be reasonably efficient. > > LLVM already looks very good; I'd just like to know whether I can > push these optimizations through LLVM to the JIT phase (which, as > far as I understand the docs, is a

Hi all, I'm in a very preliminary phase of a language project which requires some specific optimizations to be reasonably efficient. LLVM already looks very good; I'd just like to know whether I can push these optimizations through LLVM to the JIT phase (which, as far as I understand the docs, is a pretty powerful part of LLVM). The optimizations that I need to get to work are: *