search for: taddhirr

...BB %entry Live Ins: %R4 %LR tPUSH pred:14, pred:%noreg, %R4<kill>, %LR<kill>, %SP<imp-def>, %SP<imp-use>; flags: FrameSetup %vreg0<def> = tLDRpci <cp#0>, pred:14, pred:%noreg; flags: FrameSetup tGPR:%vreg0 %SP<def,tied1> = tADDhirr %SP<tied0>, %vreg0<kill>, pred:14, pred:%noreg; tGPR:%vreg0 %vreg1<def> = tLDRpci <cp#1>, pred:14, pred:%noreg; tGPR:%vreg1 %SP<def,tied1> = tADDhirr %SP<tied0>, %vreg1<kill>, pred:14, pred:%noreg; tGPR:%vreg1 tPOP_RET pred:14,...

...> Live Ins: %R4 %LR > tPUSH pred:14, pred:%noreg, %R4<kill>, %LR<kill>, %SP<imp-def>, %SP<imp-use>; flags: FrameSetup > %vreg0<def> = tLDRpci <cp#0>, pred:14, pred:%noreg; flags: FrameSetup tGPR:%vreg0 > %SP<def,tied1> = tADDhirr %SP<tied0>, %vreg0<kill>, pred:14, pred:%noreg; tGPR:%vreg0 > %vreg1<def> = tLDRpci <cp#1>, pred:14, pred:%noreg; tGPR:%vreg1 > %SP<def,tied1> = tADDhirr %SP<tied0>, %vreg1<kill>, pred:14, pred:%noreg; tGPR:%vreg1 > tPOP_RET pr...

...;> tPUSH pred:14, pred:%noreg, %R4<kill>, %LR<kill>, %SP<imp-def>, >> %SP<imp-use>; flags: FrameSetup >> %vreg0<def> = tLDRpci <cp#0>, pred:14, pred:%noreg; flags: >> FrameSetup tGPR:%vreg0 >> %SP<def,tied1> = tADDhirr %SP<tied0>, %vreg0<kill>, pred:14, >> pred:%noreg; tGPR:%vreg0 >> %vreg1<def> = tLDRpci <cp#1>, pred:14, pred:%noreg; tGPR:%vreg1 >> %SP<def,tied1> = tADDhirr %SP<tied0>, %vreg1<kill>, pred:14, >> pred:%noreg; tGPR:%vre...

CallFrameSetupOpcode is a pseudo opcode like X86::ADJCALLSTACKDOWN64. That means when the code is expected to be called before the pseudo instructions are eliminated. I don't know why it's not the case for you. A quick look at PEI code indicates the pseudo's should not have been removed at the time when replaceFrameIndices are run. Evan On Sep 25, 2013, at 8:57 AM, Krzysztof

Hi All, I'm dealing with a problem where the spill/restore instructions inserted during scavenging span an adjustment of the SP/FP register. The result is that despite the base register (SP/FP) being changed between the spill and the restore, both store and load use the same immediate offset. I see code in the PEI (replaceFrameIndices) that is supposed to track the SP/FP adjustment: