search for: tabelgen

Displaying 11 results from an estimated 11 matches for "tabelgen".

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2010 Jun 09
0
[LLVMdev] VS2008 CMake build tabelgen coding error
On 9 June 2010 14:20, Aaron Gray <aaronngray.lists at gmail.com> wrote: > I am getting 'bad suffix on number' > for lib\target\x86\X86GenInstrInfo.inc:304, 305, ... > > Tablegen is generating 0x0LLU instead of 0x0ULL and VS2008 does not like > it. > Patch attached. Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL:
2010 Jun 09
2
[LLVMdev] VS2008 CMake build tabelgen coding error
I am getting 'bad suffix on number' for lib\target\x86\X86GenInstrInfo.inc:304, 305, ... Tablegen is generating 0x0LLU instead of 0x0ULL and VS2008 does not like it. Aaron -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100609/e56cd538/attachment.html>
2011 Oct 06
0
[LLVMdev] Enhacing TabelGen
greened at obbligato.org (David A. Greene) writes: > Also, I know I introduced the #..# "pasting" operation but I've found it > to be too limiting. In this example: [snip!] > what if we instead did this: > > (Equivalent TableGen code with a for-loop) > ---------------------------------------- > multiclass PTX_FLOAT_4OP<string opcstr, SDNode opnode1, SDNode
2013 May 01
1
[LLVMdev] auto-generation of archGenDisassemblerTables.inc?
Hi, I'm looking into development of an llvm-objdump utility for hexagon and I've read that there is a way to have tablegen automatically generate decode tables for you. I've not been able to find much info on this topic, the best info I've been able to find is this tutorial: http://www.embecosm.com/appnotes/ean10/ean10-howto-llvmas-1.0.html#idp3570032 I've managed to get
2015 Nov 06
2
Instructions with no operand
On 11/6/2015 11:35 AM, Sky Flyer via llvm-dev wrote: > Guys, I stuck at this point. Could you please give me a hint how to > solve this problem without touching the LLVM backbone?! > Why LLVM doesn't let me define an instruction consisting of an operator > with no operand? Could you try it without the pattern? I.e. just this: class TestInst<string opc, string asmstr,
2017 Apr 27
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
...do list. > > If there is some way I can help contribute to fixing PR32550, I would like to help; but with the dependency on tablegen generation, I'm not sure what the best way is to help make that PR get fixed faster? Thanks for offering to help. I agree that with the dependency on the tabelgen generation in the way, this is probably not a good use of your time. Depending when I can spare some time on this, I’ll either do it or explain the refactoring in the google doc. In the meantime, I’d suggest to focus on validating the debug info on your side. > > >>> * FastISel s...
2020 Mar 15
2
MLIR project, GSoC 2020.
Hi there, I am Abhimanyu Rawat, 1st-year graduate student and researcher from Paris, I hail from a pure computer science background on both Bachelors's and Masters's level. I find MLIR projects quite interesting. I have experience writing C code for EMC^2 as a protocols engineer for 2 years, I use python for convenience tasks. From a programming language perspective(thanks to Dan
2017 May 09
4
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
...s of my todo list. If there is some way I can help contribute to fixing PR32550, I would like to help; but with the dependency on tablegen generation, I'm not sure what the best way is to help make that PR get fixed faster? Thanks for offering to help. I agree that with the dependency on the tabelgen generation in the way, this is probably not a good use of your time. Depending when I can spare some time on this, I’ll either do it or explain the refactoring in the google doc. In the meantime, I’d suggest to focus on validating the debug info on your side. * FastISel seems to transform divis...
2017 May 09
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
...is some way I can help contribute to fixing PR32550, I would like > to help; but with the dependency on tablegen generation, I'm not sure what > the best way is to help make that PR get fixed faster? > > > Thanks for offering to help. I agree that with the dependency on the > tabelgen generation in the way, this is probably not a good use of your > time. Depending when I can spare some time on this, I’ll either do it or > explain the refactoring in the google doc. > > In the meantime, I’d suggest to focus on validating the debug info on your > side. > > >...
2017 May 10
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
...ome way I can help contribute to fixing PR32550, I would like to help; but with the dependency on tablegen generation, I'm not sure what the best way is to help make that PR get fixed faster? >>>> >>>> Thanks for offering to help. I agree that with the dependency on the tabelgen generation in the way, this is probably not a good use of your time. Depending when I can spare some time on this, I’ll either do it or explain the refactoring in the google doc. >>>> >>>> In the meantime, I’d suggest to focus on validating the debug info on your side. >...
2017 Apr 26
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
Hi Kristof, > On Apr 6, 2017, at 6:53 AM, Kristof Beyls <kristof.beyls at arm.com> wrote: > > I've been digging a little bit deeper into the biggest performance regressions I've observed. > > What I've observed so far is: > * A lot of the biggest regressions are caused by unnecessarily moving floating point values through general purpose registers. I've