search for: t64

Displaying 9 results from an estimated 9 matches for "t64".

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2017 Aug 06
2
VBROADCAST Implementation Issues
...ad<LD4[ConstantPool]> t0, t65, undef:i64 >>>>>>>>>>>>> t65: i64 = X86ISD::Wrapper TargetConstantPool:i64<float >>>>>>>>>>>>> 0x3FC99999A0000000> 0 >>>>>>>>>>>>> t64: i64 = TargetConstantPool<float 0x3FC99999A0000000> 0 >>>>>>>>>>>>> t8: i64 = undef >>>>>>>>>>>>> In function: stencil >>>>>>>>>>>>> >>>>>>>>>&gt...
2017 Aug 07
2
VBROADCAST Implementation Issues
...gt; t0, t65, undef:i64 >>>>>>>>>>>>>>> t65: i64 = X86ISD::Wrapper TargetConstantPool:i64<float >>>>>>>>>>>>>>> 0x3FC99999A0000000> 0 >>>>>>>>>>>>>>> t64: i64 = TargetConstantPool<float >>>>>>>>>>>>>>> 0x3FC99999A0000000> 0 >>>>>>>>>>>>>>> t8: i64 = undef >>>>>>>>>>>>>>> In function: stencil >>>&gt...
2017 Aug 07
3
VBROADCAST Implementation Issues
...gt;>>>>>>>>>>>> t65: i64 = X86ISD::Wrapper >>>>>>>>>>>>>>>>>>> TargetConstantPool:i64<float 0x3FC99999A0000000> 0 >>>>>>>>>>>>>>>>>>> t64: i64 = TargetConstantPool<float >>>>>>>>>>>>>>>>>>> 0x3FC99999A0000000> 0 >>>>>>>>>>>>>>>>>>> t8: i64 = undef >>>>>>>>>>>>>>>>&...
2016 Aug 02
2
Instruction selection problems due to SelectionDAGBuilder
...t62: i64 = extract_vector_elt t56, Constant:i64<5> t76: ch = CopyToReg t0, Register:i64 %vreg29, t62 t63: i64 = extract_vector_elt t56, Constant:i64<6> t78: ch = CopyToReg t0, Register:i64 %vreg30, t63 t64: i64 = extract_vector_elt t56, Constant:i64<7> t80: ch = CopyToReg t0, Register:i64 %vreg31, t64 t81: ch = TokenFactor t66, t68, t70, t72, t74, t76, t78, t80 t83: ch = CopyToReg t0, Register:i64 %vreg209, Constant:i64<0> t85: c...
2024 Feb 05
7
Bug#1063270: xen: NMU diff for 64-bit time_t transition
...bxenevtchn1 (= ${binary:Version}), - libxenforeignmemory1 (= ${binary:Version}), - libxengnttab1 (= ${binary:Version}), - libxenstore4 (= ${binary:Version}), - libxentoolcore1 (= ${binary:Version}), - libxentoollog1 (= ${binary:Version}), - libxenhypfs1 (= ${binary:Version}), + libxenmisc4.17t64 (= ${binary:Version}), + libxencall1t64 (= ${binary:Version}), + libxendevicemodel1t64 (= ${binary:Version}), + libxenevtchn1t64 (= ${binary:Version}), + libxenforeignmemory1t64 (= ${binary:Version}), + libxengnttab1t64 (= ${binary:Version}), + libxenstore4t64 (= ${binary:Version}), + libxen...
2005 Mar 11
0
[LLVMdev] FP Intrinsics
...at]* cast (<4 x float>* %_ARGB56 to [4 x float]*), int 0, int 2) store float 0.000000e+000, float* getelementptr ([4 x float]* cast (<4 x float>* %_ARGB56 to [4 x float]*), int 0, int 3) %Value = call float %ReadVoxel( void* %_hVB59 ) ; <float> [#uses=1] %arg2 = load float* %T64 ; <float> [#uses=1] %VMCommandSubtract = sub float %Value, %arg2 ; <float> [#uses=1] %VMCommandAbs = call float %llvm.abs( float %VMCommandSubtract ) ; <float> [#uses=2] %isNonZero = setgt float %VMCommandAbs, 0.000000e+000 ; <bool> [#uses=1] br bool %isNonZero, lab...
2017 Oct 13
2
[SelectionDAG] Assertion due to MachineMemOperand flags difference.
...t55, t10, undef:i64 t58: i64 = add t10, Constant:i64<16> t59: ch = store<ST16[<unknown>](align=8)> t50, t57, t58, undef:i64 t61: i64 = add t10, Constant:i64<32> t62: ch = store<ST16[<unknown>](align=8)> t50, t60, t61, undef:i64 t64: i64 = add t10, Constant:i64<48> t65: ch = store<ST16[<unknown>](align=8)> t50, t63, t64, undef:i64 t67: i64 = add t10, Constant:i64<64> t68: ch = store<ST16[<unknown>](align=8)> t50, t66, t67, undef:i64 t70: i64 = add t10, Constant:i6...
2001 Oct 22
1
ogg123 bitrate average (forwarded for Jack Versfeld)
This message is in MIME format. Since your mail reader does not understand this format, some or all of this message may not be legible. ------_=_NextPart_000_01C15AF9.A721EEE0 Content-Type: text/plain; charset="iso-8859-1" Hey all... I have included a diff to the 1.0rc2 source of vorbis-tools/ogg123/ogg123.c to average the bitrate out in the reporting so that it looks a bit
2005 Mar 11
5
[LLVMdev] FP Intrinsics
Hello, I am trying to make the FP intrinsics (abs, sin, cos, sqrt) I've added work with the X86ISelPattern, but I'm having some difficulties understanding what needs to be done. I assume I have to add new nodetypes for the FP instructions to SelectionDAGNodes.h, and make nodes for these in SelectionDAGLowering::visitCall when I find the intrinsic... The part I don't quite