Displaying 2 results from an estimated 2 matches for "t5rr16alu".
2019 May 28
2
Instruction is selected, but it shouldn't (?)
...gisterClass<"CPU74", [i16], 16, (add R0, R1, R2, R3, R4, R5, R6, R7)>;
def SSP : RegisterClass<"CPU74", [i16], 16, (add SP)>;
The SP can not be used in general purpose arithmetic instructions, therefore I defined the following classes in MyTargetInstrInfo.td:
class T5rr16alu<string opcStr, string altOpcStr, SDNode opNode, bits<4> opcode>: Type5
<opcode,
(outs GR16:$rd), (ins GR16:$rn, GR16:$rs),
AsmStr< opcStr, altOpcStr, "\t$rn, $rs, $rd">.n,
[(set GR16:$rd, (opNode GR16:$rn...
2019 May 28
2
Instruction is selected, but it shouldn't (?)
...quot;, [i16], 16, (add R0, R1, R2, R3, R4, R5, R6, R7)>;
> def SSP : RegisterClass<"CPU74", [i16], 16, (add SP)>;
>
> The SP can not be used in general purpose arithmetic instructions, therefore I defined the following classes in MyTargetInstrInfo.td:
>
> class T5rr16alu<string opcStr, string altOpcStr, SDNode opNode, bits<4> opcode>: Type5
> <opcode,
> (outs GR16:$rd), (ins GR16:$rn, GR16:$rs),
> AsmStr< opcStr, altOpcStr, "\t$rn, $rs, $rd">.n,
> [(set GR16:$...