search for: t38_x

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2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...7_Y %T27_Z %T27_W %T28_X %T28_Y %T28_Z %T28_W %T29_X %T29_Y %T29_Z %T29_W %T30_X %T30_Y %T30_Z %T30_W %T31_X %T31_Y %T31_Z %T31_W %T32_X %T32_Y %T32_Z %T32_W %T33_X %T33_Y %T33_Z %T33_W %T34_X %T34_Y %T34_Z %T34_W %T35_X %T35_Y %T35_Z %T35_W %T36_X %T36_Y %T36_Z %T36_W %T37_X %T37_Y %T37_Z %T37_W %T38_X %T38_Y %T38_Z %T38_W %T39_X %T39_Y %T39_Z %T39_W %T40_X %T40_Y %T40_Z %T40_W %T41_X %T41_Y %T41_Z %T41_W %T42_X %T42_Y %T42_Z %T42_W %T43_X %T43_Y %T43_Z %T43_W %T44_X %T44_Y %T44_Z %T44_W %T45_X %T45_Y %T45_Z %T45_W %T46_X %T46_Y %T46_Z %T46_W %T47_X %T47_Y %T47_Z %T47_W %T48_X %T48_Y %T48_Z %T48_...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
..._X %T28_Y %T28_Z %T28_W %T29_X %T29_Y %T29_Z %T29_W %T30_X %T30_Y %T30_Z > %T30_W %T31_X %T31_Y %T31_Z %T31_W %T32_X %T32_Y %T32_Z %T32_W %T33_X %T33_Y > %T33_Z %T33_W %T34_X %T34_Y %T34_Z > %T34_W %T35_X %T35_Y %T35_Z %T35_W %T36_X %T36_Y %T36_Z %T36_W %T37_X %T37_Y > %T37_Z %T37_W %T38_X %T38_Y %T38_Z %T38_W %T39_X %T39_Y %T39_Z %T39_W %T40_X > %T40_Y %T40_Z %T40_W %T41_X %T41_Y %T41_Z %T41_W %T42_X %T42_Y %T42_Z %T42_W > %T43_X %T43_Y %T43_Z %T43_W %T44_X %T44_Y %T44_Z %T44_W %T45_X %T45_Y %T45_Z > %T45_W %T46_X %T46_Y %T46_Z %T46_W %T47_X %T47_Y %T47_Z %T47_W %T48_X %...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
Hi Vincent, On 24/10/2012 23:26, Vincent Lejeune wrote: > Hi, > > I don't know if my llvm ir code is faulty, or if I spot a bug in the RegisterCoalescing Pass, so I'm posting my issue on the ML. Shader and print-before-all dump are given below. > > The interessing part is the vreg6/vreg48 reduction : before RegCoalescing, the machine code is : > > // BEFORE LOOP >
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
Hi, I don't know if my llvm ir code is faulty, or if I spot a bug in the RegisterCoalescing Pass, so I'm posting my issue on the ML. Shader and print-before-all dump are given below. The interessing part is the vreg6/vreg48 reduction : before RegCoalescing, the machine code is : // BEFORE LOOP ... Some COPYs.... 400B%vreg47<def> = COPY %vreg2<kill>; R600_Reg32:%vreg47,%vreg2