Displaying 13 results from an estimated 13 matches for "t36".
Did you mean:
36
2017 Feb 28
2
rL296252 Made large integer operation codegen significantly worse.
I see we're missing an isel pattern for add producing carry and doing a
memory RMW. I'm going to see if adding that helps anything.
~Craig
On Mon, Feb 27, 2017 at 8:47 PM, Nirav Davé via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Yes. I'm seeing that as well. Not clear what's going on.
>
> In any case it looks to be unrelated to the alias analysis so barring
2019 Jan 02
5
Potential bug in SelectionDAGLegalize::ConvertNodeToLibcall()?
...Creating new node: t119: f64 = bitcast t118, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Created libcall: t119: f64 = bitcast t118, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Successfully converted node to libcall
... replacing: t38: f64 = fmaxnum t36, t37, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
with: t119: f64 = bitcast t118, /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
Is this a real bug, or am I missing something in my patch? After
spending quite a while on it I'm at a loss...
2011 Feb 20
2
concatenate vector after strsplit()
...uot;), c("Focused", "10k", "A12", "t20.tif", "+", "µm"),
c("Focused", "10k", "A12", "t24.tif", "+", "µm"), c("Focused",
"10k", "A12", "t36.tif", "+", "µm"), c("Focused", "10k",
"A12", "t48.tif", "+", "µm"), c("Focused", "10k", "B12",
"t04.tif", "+", "µm"), c("Focused", &qu...
2019 Jun 02
2
Optimizing Compare instruction selection
...int rv = doSmth( y );
return neg ? - rv : rv;
}
Apparently, LLVM attempts to physically use the result of a CMP instruction through a function call by storing it on a temporary register. This is found before the doSmth function call,
t30: i16 = CMPkr16 t4, TargetConstant:i16<0>
t36: ch,glue = CopyToReg t0, Register:i16 $sr, t30
t32: i16 = NEGSETCC TargetConstant:i16<4>, t36:1
And this is generated after the call
t35: ch,glue = CopyToReg t0, Register:i16 $sr, t30
t31: i16 = SELCC t19, t18, TargetConstant:i16<4>, t35:1
t21: ch,glue = CopyToReg t18:1,...
2019 Jan 03
3
Potential bug in SelectionDAGLegalize::ConvertNodeToLibcall()?
...> /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> > Created libcall: t119: f64 = bitcast t118,
> > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> > Successfully converted node to libcall
> > ... replacing: t38: f64 = fmaxnum t36, t37,
> > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> > with: t119: f64 = bitcast t118,
> > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> >
> > Is this a real bug, or am I missing something in my patch? Aft...
2017 Oct 13
2
[SelectionDAG] Assertion due to MachineMemOperand flags difference.
...64 = add FrameIndex:i64<1>, Constant:i64<16>
t28: v4i32,ch = load<LD16[%0+16](align=8)(dereferenceable)> t20, t27, undef:i64
t31: i64 = add FrameIndex:i64<1>, Constant:i64<32>
t32: v4i32,ch = load<LD16[%0+32](align=8)(dereferenceable)> t20, t31, undef:i64
t36: i64 = add FrameIndex:i64<1>, Constant:i64<48>
t37: v4i32,ch = load<LD16[%0+48](align=8)(dereferenceable)> t20, t36, undef:i64
t41: i64 = add FrameIndex:i64<1>, Constant:i64<64>
t42: v4i32,ch = load<LD16[%0+64](align=8)(dereferenceable)> t20, t41, undef:i64...
2016 Aug 02
2
Instruction selection problems due to SelectionDAGBuilder
...t32: ch = CopyToReg t0, Register:i64 %vreg19, t20
t21: i64 = extract_vector_elt t16, Constant:i64<4>
t34: ch = CopyToReg t0, Register:i64 %vreg20, t21
t22: i64 = extract_vector_elt t16, Constant:i64<5>
t36: ch = CopyToReg t0, Register:i64 %vreg21, t22
t23: i64 = extract_vector_elt t16, Constant:i64<6>
t38: ch = CopyToReg t0, Register:i64 %vreg22, t23
t24: i64 = extract_vector_elt t16, Constant:i64<7>
t40: ch = CopyToR...
2019 Jun 05
2
Optimizing Compare instruction selection
...rn neg ? - rv : rv;
> }
>
> Apparently, LLVM attempts to physically use the result of a CMP instruction through a function call by storing it on a temporary register. This is found before the doSmth function call,
>
> t30: i16 = CMPkr16 t4, TargetConstant:i16<0>
> t36: ch,glue = CopyToReg t0, Register:i16 $sr, t30
> t32: i16 = NEGSETCC TargetConstant:i16<4>, t36:1
>
>
> And this is generated after the call
>
> t35: ch,glue = CopyToReg t0, Register:i16 $sr, t30
> t31: i16 = SELCC t19, t18, TargetConstant:i16<4>, t3...
2019 Jan 04
2
Potential bug in SelectionDAGLegalize::ConvertNodeToLibcall()?
...> /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> > Created libcall: t119: f64 = bitcast t118,
> > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> > Successfully converted node to libcall
> > ... replacing: t38: f64 = fmaxnum t36, t37,
> > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> > with: t119: f64 = bitcast t118,
> > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
> >
> > Is this a real bug, or am I missing something in my patch? Aft...
2019 Jan 04
2
Potential bug in SelectionDAGLegalize::ConvertNodeToLibcall()?
...mpiler-rt/lib/builtins/divdc3.c:24:22
>> > > Created libcall: t119: f64 = bitcast t118,
>> > > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
>> > > Successfully converted node to libcall
>> > > ... replacing: t38: f64 = fmaxnum t36, t37,
>> > > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
>> > > with: t119: f64 = bitcast t118,
>> > > /home/chmeee/freebsd/contrib/compiler-rt/lib/builtins/divdc3.c:24:22
>> > >
>> > > Is this a real bug...
2013 Apr 25
0
Reading data from a text file conditionally skipping lines
...???????????????????????????????????????????????????????????????????????????????
# [3] "38\t43\t39\t44\t45"??????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????
?#[4] "39\t44\t36\t49\t46"??????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????
?#[5] "42\t45\t47\t49\t37"??????????????????????????????????????????????????????????????????????????????????????...
2019 Jun 01
2
Optimizing Compare instruction selection
I attempt to optimize the use of the ‘CMP’ instruction on my architecture by removing the instruction instances where the Status Register already had the correct status flags.
The cmp instruction in my architecture is the typical one that compares two registers, or a register with an immediate, and sets the Status Flags accordingly. I implemented my ‘cmp’ instruction in LLVM by custom lowering
2020 Jul 05
8
[RFC] carry-less multiplication instruction
<div> </div><div><div><p>Carry-less multiplication[1] instructions exist (at least optionally) on many architectures: armv8, RISC-V, x86_64, POWER, SPARC, C64x, and possibly more.</p><p>This proposal is to add a <code>llvm.clmul</code> instruction. Or if that is contentious, <code>llvm.experimental.bitmanip.clmul</code> instruction.