search for: t21

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2018 Apr 09
1
llvm-dev Digest, Vol 166, Issue 22
...fore reduceBuildVecToShuffle SelectionDAG has 14 nodes: t0: ch = EntryToken t2: v4i16,ch = CopyFromReg t0, Register:v4i16 %0 // [a b c d] t26: v2i16 = extract_subvector t2, Constant:i32<0> // [a b] t27: i16 = extract_vector_elt t26, Constant:i32<0> // [a] t21: v2i16 = extract_subvector t2, Constant:i32<2> //[c d] t22: i16 = extract_vector_elt t21, Constant:i32<0> // [c] t25: v2i16 = BUILD_VECTOR t27, t22 // [a c] t18: ch,glue = CopyToReg t0, Register:v2i16 %m0, t25 t19: ch = RTN t18 t20: ch = RTN_REG_HOLDER t19, Regist...
2006 Jun 27
1
Boxplot questions.
Dear all, I am having a data for 2 different treatments with different time points. So, I used the following code to plot the boxplot and also to do anova. T11 <- c(280, 336, 249, 277, 429) T12 <- c(400, 397, 285, 407, 313) T13 <- c(725, 373, 364, 706, 249) T21 <- c(589, 257, 466, 248, 913) T22 <- c(519, 424, 512, 298, 907) T23 <- c(529, 479, 634, 354, 1015) obs <- c(T11, T12, T13, T21, T22, T23) treat <- c(rep("T1",15), rep("T2",15)) time <- c(rep("one",5), rep("two",5), rep("thr",5),...
2016 Oct 20
2
[AVX512BW] Nasty KAND issue
...lem with your IR is actually the load. When you load a value whose size in bits is not a multiple of 8 (like i1, or <4 x i1>, the result is undefined unless the unused bits are zero. You can see this in the debug output from llc: SelectionDAG has 15 nodes: t0: ch = EntryToken t21: i32 = X86ISD::KORTEST t19, t19 t22: i8 = X86ISD::SETCC Constant:i8<4>, t21 t23: i32 = zero_extend t22 t14: ch,glue = CopyToReg t0, Register:i32 %EAX, t23 t24: i16,ch = load<LD1[%XXX](align=4)(dereferenceable), zext from i8> t0, FrameIndex:i64<0>, undef:i64...
2019 Jun 05
2
Strange behaviour of post-legalising optimisations(?)
...t13: i16 = add t2, Constant:i16<1> Creating new node: t15: ch = CopyToReg t0, Register:i16 %4, t13 Creating new node: t17: i16,ch = CopyFromReg t0, Register:i16 %0 Creating constant: t18: i16 = Constant<-1> Creating new node: t19: i16 = add t17, Constant:i16<-1> Creating new node: t21: ch = CopyToReg t0, Register:i16 %5, t19 Creating new node: t22: ch = TokenFactor t12, t15, t21, t8 Creating new node: t24: ch = br t22, BasicBlock:ch<for.cond 0x10985e000> Initial selection DAG: %bb.3 'tst:for.body' SelectionDAG has 25 nodes: t0: ch = EntryToken t2: i16,ch = Copy...
2016 Aug 02
2
Instruction selection problems due to SelectionDAGBuilder
...t19: i64 = extract_vector_elt t16, Constant:i64<2> t30: ch = CopyToReg t0, Register:i64 %vreg18, t19 t20: i64 = extract_vector_elt t16, Constant:i64<3> t32: ch = CopyToReg t0, Register:i64 %vreg19, t20 t21: i64 = extract_vector_elt t16, Constant:i64<4> t34: ch = CopyToReg t0, Register:i64 %vreg20, t21 t22: i64 = extract_vector_elt t16, Constant:i64<5> t36: ch = CopyToReg t0, Register:i64 %vreg21, t22 t23: i64 = extrac...
2018 Apr 30
0
[SelectionDAG] DbgValue nodes aren't transferred
...yped, test.c:5:11 t19: ch,glue = callseq_end t18, TargetConstant:i64<0>, TargetConstant:i64<0>, t18:1, test.c:5:11 t20: i32,ch,glue = CopyFromReg t19, Register:i32 $w0, t19:1, test.c:5:11 Then, TargetLowering::LowerCallTo adds a truncate node since the function return type is i16. t21: i16 = truncate t20, test.c:5:11 When lowering the dbg.value intrinsic, a SDDbgValue node is attached to the truncate since it is the final result of the call. Lowering the third call constructs any_extend(t21) for the 32-bit register type but optimizes out the truncate node by the following cod...
2017 Feb 14
2
Ensuring chain dependencies with expansion to libcalls
...1 t6: i64,ch,glue = CopyFromReg t4:1, Register:i64 %reg2, t4:1 t8: i64,ch,glue = CopyFromReg t6:1, Register:i64 %reg3, t6:1 t9: ch = TokenFactor t2:1, t4:1, t6:1, t8:1 t19: ch,glue = callseq_start t9, TargetConstant:i32<0> t20: ch,glue = CopyToReg t19, Register:i64 %reg0, t2 t21: ch,glue = CopyToReg t20, Register:i64 %reg1, t4, t20:1 t23: ch,glue = SHAVEISD::CALL t21, TargetGlobalAddress:i32<i64 (i64, i64)* @__divdi3> 0, Register:i64 %reg0, Register:i64 %reg1, RegisterMask:Untyped, t21:1 t24: ch,glue = callseq_end t23, TargetConstant:i32<0>, TargetGlobalAdd...
2008 Jul 16
6
OT - Windows slowdown?
I know this isn't the right forum for this (do I ever!), but you-all know so much about everything I thought I'd ask. About two months ago I resurrected my daughter's Compaq laptop (cracked screen - replaced it) and ran an update on it. It's running Windows XP, SP1 (I think), but since the update it has run about 1/3 as fast as it used to. Does anyone know if there was a WXP
2018 Apr 30
2
[SelectionDAG] DbgValue nodes aren't transferred
...ch,glue = callseq_end t18, TargetConstant:i64<0>, TargetConstant:i64<0>, t18:1, test.c:5:11 > t20: i32,ch,glue = CopyFromReg t19, Register:i32 $w0, t19:1, test.c:5:11 > > Then, TargetLowering::LowerCallTo adds a truncate node since the function return type is i16. > > t21: i16 = truncate t20, test.c:5:11 > > When lowering the dbg.value intrinsic, a SDDbgValue node is attached to the truncate since it is the final result of the call. > > Lowering the third call constructs any_extend(t21) for the 32-bit register type but optimizes out the truncate node...
2016 Jan 25
2
Instruction selection gives "LLVM ERROR: Cannot select"
...= !{!"llvm.loop.unroll.disable"} !3 = distinct !{!3, !4, !5} !4 = !{!"llvm.loop.vectorize.width", i32 1} !5 = !{!"llvm.loop.interleave.count", i32 1} !6 = distinct !{!6, !2} !7 = distinct !{!7, !4, !5} I get the following error: LLVM ERROR: Cannot select: t21: ch = store<ST64[%6](align=4)> t20, t19, t6, undef:i64 I don't understand why because it seems to me store is specified well in [MyTarget]InstrInfo.td . Can somebody help with an idea? Myself I will try to debug the code generated with TableGen, implementing the function Se...
2018 Mar 15
1
[SelectionDAG] DbgValue nodes aren't transferred
> On Mar 14, 2018, at 7:55 PM, Se Jong Oh <sejooh at microsoft.com> wrote: > > Hi Jonas, > > Thanks for taking a look! It makes linear-dbg-value.ll pass for my target by producing DEBUG_VALUEs correctly. I also tried a simple function with few operations and confirmed DEBUG_VALUEs which are not produced without trasferDbgValues in SetPromotedInteger. That’s great news! Do
2016 Oct 20
2
[AVX512BW] Nasty KAND issue
On Thu, Oct 20, 2016 at 12:05 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > >> On Oct 20, 2016, at 8:54 AM, Cameron McInally via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> Hey guys, >> >> I've hit a pretty nasty issue on SKX with ANDs of masks <= 4 bits. >> >> In the IR, we represent a 4b vector mask as <4 x i1>.
2018 Apr 30
0
[SelectionDAG] DbgValue nodes aren't transferred
...ntyped, test.c:5:11 t19: ch,glue = callseq_end t18, TargetConstant:i64<0>, TargetConstant:i64<0>, t18:1, test.c:5:11 t20: i32,ch,glue = CopyFromReg t19, Register:i32 $w0, t19:1, test.c:5:11 Then, TargetLowering::LowerCallTo adds a truncate node since the function return type is i16. t21: i16 = truncate t20, test.c:5:11 When lowering the dbg.value intrinsic, a SDDbgValue node is attached to the truncate since it is the final result of the call. Lowering the third call constructs any_extend(t21) for the 32-bit register type but optimizes out the truncate node by the following code...
2005 Jul 12
1
Bug report
...ms available, one for within windows, one as a bootdisk. i'm trying the bootdisk option. win/dos is required to decompress the image, i cannot get BOCHS/unzip to work. this unit has no cd-rom or floppy, or windows, so memdisk looks perfect, however... this unit is also part of a T20, part of a T21. its possible the flash utility is just freaking out over mixed parts issues, HOWEVER, the T20/21/22 use the same motherboard/processors/etc anyways, so i think the possibilities are remote. i'm ordering a floppy drive and dvd burner for this unit, when i verify the program works normally, i...
2002 Aug 21
1
power management and ext3 - mount as ext2?
...mounting the partitions as ext2 while mobile on batteries? The hard disk would spin down when it wasn't in use (if noflush, etc. has been configured). But what about data integrity when remounting as ext3 later? I figure this is a good a place as any to start learning about the file system. T21 Thinkpad with rh7.3 and Ximian Desktop - lilo, / (ext3), /home (ext3), and /swap Bret
2003 Dec 03
2
memory leak (PR#5476)
Full_Name: g. schiessler Version: 1.8.1 OS: Windows 2000 Pro Submission from: (NULL) (24.229.106.55) Appears to be memory leak with =RApply("qnorm",K56)*-1 function from within Excel 2000. Have spreadsheet with between 100 and 500 of above references. When spreadsheet first opened system using about 200MB but very quickly grows to over 600MB and appears to be unlimited. Is there
2019 Jun 02
2
Optimizing Compare instruction selection
...etConstant:i16<0> t36: ch,glue = CopyToReg t0, Register:i16 $sr, t30 t32: i16 = NEGSETCC TargetConstant:i16<4>, t36:1 And this is generated after the call t35: ch,glue = CopyToReg t0, Register:i16 $sr, t30 t31: i16 = SELCC t19, t18, TargetConstant:i16<4>, t35:1 t21: ch,glue = CopyToReg t18:1, Register:i16 $r0, t31 NEGSETCC and SELCC are genuine instructions of my target architecture, they use the SR along with operands to produce a result. As you can see ‘t30’ is used both before and after the function call, which is what I think that causes trouble. In pa...
2018 Mar 14
2
[SelectionDAG] DbgValue nodes aren't transferred
Hi Jonas, Thanks for taking a look! It makes linear-dbg-value.ll pass for my target by producing DEBUG_VALUEs correctly. I also tried a simple function with few operations and confirmed DEBUG_VALUEs which are not produced without trasferDbgValues in SetPromotedInteger. Thanks, Sejong From: jdevlieghere at apple.com <jdevlieghere at apple.com> Sent: Wednesday, March 14, 2018 4:07 AM To: Se
2001 Jun 16
2
Inconsistent ext3fs after crash (2.2.19/0.0.7a)
...for group #6 (15784, counted=15786). Fix? yes Free inodes count wrong (120378, counted=120380). Fix? yes /dev/hda8: ***** FILE SYSTEM WAS MODIFIED ***** /dev/hda8: 8388/128768 files (0.8% non-contiguous), 92277/257032 blocks [...] This is 2.2.19 + ide/udma patches + ext3 patches on an ThinkPad T21 00:07.1 IDE interface: Intel Corporation 82371AB PIIX4 IDE (rev 01) (prog-if 80 [Master]) hda: IBM-DJSA-232, 30520MB w/1874kB Cache, CHS=4134/240/63, UDMA(33) Flo -- Florian Lohoff flo@rfc822.org +49-5201-669912 Why is it called "common sense" when nob...
2019 Jun 05
2
Optimizing Compare instruction selection
...CopyToReg t0, Register:i16 $sr, t30 > t32: i16 = NEGSETCC TargetConstant:i16<4>, t36:1 > > > And this is generated after the call > > t35: ch,glue = CopyToReg t0, Register:i16 $sr, t30 > t31: i16 = SELCC t19, t18, TargetConstant:i16<4>, t35:1 > t21: ch,glue = CopyToReg t18:1, Register:i16 $r0, t31 > > NEGSETCC and SELCC are genuine instructions of my target architecture, they use the SR along with operands to produce a result. > > As you can see ‘t30’ is used both before and after the function call, which is what I think that...