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172
2016 Jul 30
1
Instruction selection bug for vector store with FixedStack
Hello.
Could you please help me solve the following LLC bug happening at instruction
selection time:
ISEL: Starting pattern match on root node: t172: ch = store<ST64[FixedStack6]>
t0, t6, FrameIndex:i64<6>, undef:i64
Initial Opcode index to 157
Skipped scope entry (due to false predicate) at index 162, continuing at 236
Match failed at index 241
Continuing at 263
LLVM ERROR: Can...