Displaying 5 results from an estimated 5 matches for "t127".
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127
2016 Jul 30
1
Instruction selection bug for vector store with FixedStack
...t143: i64 = add t142, Constant:i64<8>
t172: ch = store<ST64[FixedStack6]> t0, t6, FrameIndex:i64<6>, undef:i64
t173: i64,ch = load<LD8[FixedStack6](align=64)> t172, FrameIndex:i64<6>,
undef:i64
...
t127: ch = store<ST8[%aPtr.addr74]> t105:1, t109, Constant:i64<0>,
undef:i64
t106: v8i64 = add t105, t79
t129: ch = store<ST64[inttoptr (i64 3 to <8 x
i64>*)](align=8)(alias.scope=<0x20c8ea0>)(noalias=<0x20c8a80>,<0x20cd70...
2015 Jan 17
3
[LLVMdev] Howdy + GIT
> Most of this is solved by importing the patch with git am. But it works only if the patch was generated from git format-patch.
Trouble is, that's not what we get, or at least nowhere near often
enough to even bother learning that tool.
> If you want to save also the “download and find the patch file”, any review coming from Phabricator can be committed in a single command, for
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...ndef:i64, undef:i64, undef:i64, undef:i64, undef:i64, undef:i64, undef:i64,
undef:i64, undef:i64, undef:i64, undef:i64, undef:i64...
Split node result: t126: v8i64 = BUILD_VECTOR undef:i64, undef:i64, undef:i64,
undef:i64, undef:i64, undef:i64, undef:i64, undef:i64...
Split node result: t127: v4i64 = BUILD_VECTOR undef:i64, undef:i64, undef:i64,
undef:i64...
Split node result: t128: v2i64 = BUILD_VECTOR undef:i64, undef:i64
Split node operand: t122: v128i16,ch = masked_gather<LD128[<unknown>](align=256)> t0,
t130, t193, TargetConstant:i64<0>, t121
l...
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...i64, undef:i64, undef:i64, undef:i64, undef:i64, undef:i64,
> undef:i64, undef:i64, undef:i64, undef:i64, undef:i64...
> Split node result: t126: v8i64 = BUILD_VECTOR undef:i64, undef:i64, undef:i64,
> undef:i64, undef:i64, undef:i64, undef:i64, undef:i64...
> Split node result: t127: v4i64 = BUILD_VECTOR undef:i64, undef:i64, undef:i64,
> undef:i64...
> Split node result: t128: v2i64 = BUILD_VECTOR undef:i64, undef:i64
>
> Split node operand: t122: v128i16,ch = masked_gather<LD128[<unknown>](align=256)> t0,
> t130, t193, TargetConstant:i64<...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
Will, thanks a lot for pointing me to the MaskedGatherSDNode and mgatherv4i32. I have
to say that the definition of the "multiclass avx512_gather" from
lib/Target/X86/X86InstrAVX512.td is difficult to follow and I prefer not to use it.
I currently have some serious problems with TableGen - it gives an assertion failure: