Displaying 3 results from an estimated 3 matches for "syncicache".
2008 Jun 16
0
[LLVMdev] PowerPC instruction cache invalidation
On Mon, 16 Jun 2008, Gary Benson wrote:
> When you genetate code on PowerPC you need to explicitly invalidate
> the instruction cache to force the processor to reread it. In LLVM
> there is code to do this for function stubs on Macintosh, but not
> for other platforms and not for JITted code generally.
Applied, thanks!
2008 Jun 17
1
[LLVMdev] PowerPC instruction cache invalidation
...nfo.cpp
===================================================================
--- lib/Target/PowerPC/PPCJITInfo.cpp (revision 52391)
+++ lib/Target/PowerPC/PPCJITInfo.cpp (working copy)
@@ -330,12 +330,9 @@
extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
#endif
-/// SyncICache - On PPC, the JIT emitted code must be explicitly refetched to
-/// ensure correct execution.
-static void SyncICache(const void *Addr, size_t len) {
-#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
-
-#ifdef __APPLE__
+void PPCJITInfo::InvalidateInstructionCache(const void *Addr...
2008 Jun 16
6
[LLVMdev] PowerPC instruction cache invalidation
Hi all,
When you genetate code on PowerPC you need to explicitly invalidate
the instruction cache to force the processor to reread it. In LLVM
there is code to do this for function stubs on Macintosh, but not
for other platforms and not for JITted code generally.
The attached patch adds support for GNU platforms, but I can't figure
out a nice way to call it for all generated code. Can