search for: sync_cor

Zachary Amsden wrote: > Jeremy Fitzhardinge wrote: >> Zachary Amsden wrote: >>> I removed sync_core from paravirt ops (it is always a raw cpuid in >>> all cases). I didn't want to touch Jeremy's patch 020 and cause >>> sync problems for him, so I haven't removed it there. >> It wouldn't necessarily be cpuid on an hvm guest. > > Yes, CPUID could be...

...esc_struct; @@ -15,6 +22,8 @@ struct paravirt_ops { unsigned int kernel_rpl; + unsigned (*patch)(unsigned int type, void *firstinsn, unsigned len); + void (*cpuid)(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx); @@ -108,10 +117,6 @@ static inline void sync_core(void) #define read_cr4_safe(x) paravirt_ops.read_cr4_safe() #define write_cr4(x) paravirt_ops.write_cr4(x) -#define __local_save_flags() paravirt_ops.save_fl() -#define __local_irq_restore(f) paravirt_ops.restore_fl(f) -#define local_irq_disable() paravirt_ops.irq_disable() -#define local_irq_...

...esc_struct; @@ -15,6 +22,8 @@ struct paravirt_ops { unsigned int kernel_rpl; + unsigned (*patch)(unsigned int type, void *firstinsn, unsigned len); + void (*cpuid)(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx); @@ -108,10 +117,6 @@ static inline void sync_core(void) #define read_cr4_safe(x) paravirt_ops.read_cr4_safe() #define write_cr4(x) paravirt_ops.write_cr4(x) -#define __local_save_flags() paravirt_ops.save_fl() -#define __local_irq_restore(f) paravirt_ops.restore_fl(f) -#define local_irq_disable() paravirt_ops.irq_disable() -#define local_irq_...

...-- it is emulated by Xen and might not > + * execute an iret (or similar synchronizing instruction) > + * internally. > + * > + * cpuid() would trap as well. Unclear if that's a solution > + * either. > + */ > + if (in_nmi()) > + cpuid_eax(1); > + else > + sync_core(); > +} That's not thinking staight; what do you think the INT3 does when it happens inside an NMI ?

...;2" (*ecx)); -} - /* * Generic CPUID function * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx @@ -281,13 +270,6 @@ static inline void clear_in_cr4 (unsigne outb((reg), 0x22); \ outb((data), 0x23); \ } while (0) - -/* Stop speculative execution */ -static inline void sync_core(void) -{ - int tmp; - asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory"); -} static inline void __monitor(const void *eax, unsigned long ecx, unsigned long edx) @@ -508,33 +490,6 @@ static inline voi...

...;2" (*ecx)); -} - /* * Generic CPUID function * clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx @@ -281,13 +270,6 @@ static inline void clear_in_cr4 (unsigne outb((reg), 0x22); \ outb((data), 0x23); \ } while (0) - -/* Stop speculative execution */ -static inline void sync_core(void) -{ - int tmp; - asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory"); -} static inline void __monitor(const void *eax, unsigned long ecx, unsigned long edx) @@ -508,33 +490,6 @@ static inline voi...

...he ftrace + * hooking algorithm working with the expected 5 bytes instruction. + */ + memcpy(replaced, new_code, MCOUNT_INSN_SIZE); + replaced[MCOUNT_INSN_SIZE] = ideal_nops[1][0]; + + ip = text_ip_addr(ip); + + if (probe_kernel_write((void *)ip, replaced, sizeof(replaced))) + return -EPERM; + + sync_core(); + + return 0; + +} + int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, unsigned long addr) { @@ -153,7 +191,7 @@ int ftrace_make_nop(struct module *mod, * just modify the code directly. */ if (addr == MCOUNT_ADDR) - return ftrace_modify_code_direct(rec->ip, ol...

...he ftrace + * hooking algorithm working with the expected 5 bytes instruction. + */ + memcpy(replaced, new_code, MCOUNT_INSN_SIZE); + replaced[MCOUNT_INSN_SIZE] = ideal_nops[1][0]; + + ip = text_ip_addr(ip); + + if (probe_kernel_write((void *)ip, replaced, sizeof(replaced))) + return -EPERM; + + sync_core(); + + return 0; + +} + int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, unsigned long addr) { @@ -153,7 +191,7 @@ int ftrace_make_nop(struct module *mod, * just modify the code directly. */ if (addr == MCOUNT_ADDR) - return ftrace_modify_code_direct(rec->ip, ol...

...implement inline + assembler replacements. */ + + void (fastcall *cpuid)(unsigned int *eax, unsigned int *ebx, + unsigned int *ecx, unsigned int *edx); + + unsigned int (fastcall *get_debugreg)(int regno); + void (fastcall *set_debugreg)(int regno, unsigned int value); + + void (fastcall *sync_core)(void); + + void (fastcall *clts)(void); + + unsigned int (fastcall *read_cr0)(void); + void (fastcall *write_cr0)(unsigned int); + + unsigned int (fastcall *read_cr2)(void); + void (fastcall *write_cr2)(unsigned int); + + unsigned int (fastcall *read_cr3)(void); + void (fastcall *write_cr3)(unsig...

...ese, necessitates that target pv-ops not be preemptible. I don't think that is a correct inferrence. > Once that is a given (for safety these need to be explicitly whitelisted > in runtime_patch()), use a state-machine with the primary CPU doing the > patching and secondary CPUs in a sync_core() loop. > > In case we hit an INT3/BP (in NMI or thread-context) we makes forward > progress by continuing the patching instead of emulating. > > One remaining issue is inter-dependent pv-ops which are also executed in > the NMI handler -- patching can potentially deadlock in...

...ese, necessitates that target pv-ops not be preemptible. I don't think that is a correct inferrence. > Once that is a given (for safety these need to be explicitly whitelisted > in runtime_patch()), use a state-machine with the primary CPU doing the > patching and secondary CPUs in a sync_core() loop. > > In case we hit an INT3/BP (in NMI or thread-context) we makes forward > progress by continuing the patching instead of emulating. > > One remaining issue is inter-dependent pv-ops which are also executed in > the NMI handler -- patching can potentially deadlock in...

...): - Swap rax for rdx on entry/64 changes based on feedback. - Addressed feedback from Borislav Petkov on boot, paravirt, alternatives and globally. - Rebased the patchset and ensure it works with large kaslr (not included). - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. - fix typo on comment end line. - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chrom...

...): - Swap rax for rdx on entry/64 changes based on feedback. - Addressed feedback from Borislav Petkov on boot, paravirt, alternatives and globally. - Rebased the patchset and ensure it works with large kaslr (not included). - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. - fix typo on comment end line. - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chrom...

Minor changes based on feedback and rebase from v8. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. - fix typo on comment end line. - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chrom...

Minor changes based on feedback and rebase from v8. Splitting the previous serie in two. This part contains assembly code changes required for PIE but without any direct dependencies with the rest of the patchset. Changes: - patch v9 (assembly): - Moved to relative reference for sync_core based on feedback. - x86/crypto had multiple algorithms deleted, removed PIE changes to them. - fix typo on comment end line. - patch v8 (assembly): - Fix issues in crypto changes (thanks to Eric Biggers). - Remove unnecessary jump table change. - Change author and signoff to chrom...

Hi Andi, Here's a little batch of cleanups: - re-enable VDSO when PARAVIRT is enabled - make the parainstructions symbols match the other altinstructions naming convention - add kernel command-line options to disable altinstructions for smp and pv_ops Oh, and I'm mailing your noreplacement patch back at you, for no particularly good reason. J --

Hi Andi, Here's a little batch of cleanups: - re-enable VDSO when PARAVIRT is enabled - make the parainstructions symbols match the other altinstructions naming convention - add kernel command-line options to disable altinstructions for smp and pv_ops Oh, and I'm mailing your noreplacement patch back at you, for no particularly good reason. J --

...irtualizable pieces of processor.h into default and VMI subarches. CPUID is non-virtualizable, since it doesn't trap, and very often the hypervisor will want to hide specific feature bits from the kernel. To provide a replacement for call sites that use CPUID as a serializing instruction, the sync_core() macro is still available. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.16-rc5/include/asm-i386/processor.h =================================================================== --- linux-2.6.16-rc5.orig/include/asm-i386/processor.h 2006-03-10 12:55:09.000000000 -0800 ++...

...irtualizable pieces of processor.h into default and VMI subarches. CPUID is non-virtualizable, since it doesn't trap, and very often the hypervisor will want to hide specific feature bits from the kernel. To provide a replacement for call sites that use CPUID as a serializing instruction, the sync_core() macro is still available. Signed-off-by: Zachary Amsden <zach@vmware.com> Index: linux-2.6.16-rc5/include/asm-i386/processor.h =================================================================== --- linux-2.6.16-rc5.orig/include/asm-i386/processor.h 2006-03-10 12:55:09.000000000 -0800 ++...

...on entry/64 changes based on feedback. > - Addressed feedback from Borislav Petkov on boot, paravirt, alternatives > and globally. > - Rebased the patchset and ensure it works with large kaslr (not included). > - patch v9 (assembly): > - Moved to relative reference for sync_core based on feedback. > - x86/crypto had multiple algorithms deleted, removed PIE changes to them. > - fix typo on comment end line. > - patch v8 (assembly): > - Fix issues in crypto changes (thanks to Eric Biggers). > - Remove unnecessary jump table change. > - Chan...