search for: sylver

Displaying 9 results from an estimated 9 matches for "sylver".

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2009 Jun 10
2
[LLVMdev] Call to address 0 gets removed
> Calling 0 is undefined behavior; the optimizer is within its rights to > remove this. Why do you want to call 0? For example, on embedded platforms you call 0 to do a soft reset. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
2009 Jun 30
2
[LLVMdev] About debug in LLVM!!!
> 2. The backend (llc) converts that to Dwarf (or something else as > desired by that back-end). > How advanced is LLVM Dwarf generation compared to GCC ?
2009 Aug 06
0
[LLVMdev] About debug in LLVM!!!
On Tue, Jun 30, 2009 at 6:11 AM, Sylvere Teissier<st at invia.fr> wrote: >> 2. The backend (llc) converts that to Dwarf (or something else as >> desired by that back-end). >> > How advanced is LLVM Dwarf generation compared to GCC ? Devang can probably give a better answer, but my understanding is: 1. At -O0,...
2009 Sep 29
2
[LLVMdev] [PATCH] isBarrier is missing on "return" instructions
Hi, this is a small patch of ARM Instructions description because "-verify-machineinstrs" complains about that. This doesn't break the tests on my machine. Regards -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: patch_barrier URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090929/84aca914/attachment.ksh>
2010 Jun 04
1
[LLVMdev] Heads up: Local register allocator going away
On Jun 4, 2010, at 3:05 AM, Sylvere Teissier wrote: > > In my target the CALL instruction change the link Register %LR > In the target InstrInfo.td I have "Defs=[LR]" on the CALL instruction > definition to handle that. So your CALL instructions are clobbering your callee-saved registers, eh? ;-) > It wor...
2009 Jun 17
1
[LLVMdev] Mailing List lag
I think there is a latency problem with the mail server. That create answer echo :D > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
2009 Jul 21
1
[LLVMdev] LLVM and Interrupt Service Routines.
> How each target handles the code generation > differences will be the interesting part. Why not use a target specific calling convention? An interrupt is like a normal function call, it only has a different calling convention.
2009 Sep 24
0
[LLVMdev] Missing isBarrier on ARM/THUMB return instructions
isBarrier is not defined in BX_RET and tBX_RET instructions and the Machine Instructions Verifier (-verify-machineinstrs) give errors about that. Is it normal that isBarrier is not defined on these instructions ?
2009 Sep 18
0
[LLVMdev] Problems with live-ins and live-outs
Hi, With the MSP430 target I have live-in/live-out problems pointed out by Machine Instruction Verifier with the attached test-case compiled with: clang-cc -triple=msp430-unknown-unknown test-live.c -S -o - -O1 -verify-machineinstrs -debug For example: %R15W is killed in MBB#0: CMP16rr %R14W<kill>, %R15W<kill>, %SRW<imp-def> But %R15 as live-in in MMB#1: if.else: 0xa244c20,