Displaying 4 results from an estimated 4 matches for "switchcase".
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switchcases
2011 Feb 11
0
[LLVMdev] Compiler error when self-hosting
...t*>::~parser() + 20710
16 clang 0x0000000100b96557 llvm::cl::parser<llvm::PassInfo
const*>::~parser() + 22135
17 clang 0x0000000100b96a7d llvm::cl::parser<llvm::PassInfo
const*>::~parser() + 23453
18 clang 0x00000001001124b6 std::_Rb_tree<clang::SwitchCase*,
std::pair<clang::SwitchCase* const, unsigned int>,
std::_Select1st<std::pair<clang::SwitchCase* const, unsigned int> >,
std::less<clang::SwitchCase*>, std::allocator<std::pair<clang::SwitchCase*
const, unsigned int> > >::_M_insert_unique(std::pair<clang::...
2014 Jul 17
2
[LLVMdev] LLVM Code Generation on flattened IR code
Hello,
I made two flattening transformation filters, one use a switch instruction for the dispatcher, and the other an indirectbranch instruction. Both work well but llc is very time consuming in the second case : 10 minutes for a 500 basic block function, while it takes 10 seconds for the switchcase implementation . The instrumentation of llc shows that most of the time is passed in the Machine Block Frequency Analysis pass
I don't understand why there is so huge difference. Is there a way to speed up llc ?
Charles Salmon
2006 Dec 19
3
[LLVMdev] alias-aware scheduling
...std::vector<SDOperand> PendingLoads;
/// Case - A pair of values to record the Value for a switch case, and the
@@ -412,6 +421,7 @@
// implemented with a libcall, etc.
TargetLowering &TLI;
SelectionDAG &DAG;
+ AliasAnalysis &AA;
const TargetData *TD;
/// SwitchCases - Vector of CaseBlock structures used to communicate
@@ -424,8 +434,9 @@
FunctionLoweringInfo &FuncInfo;
SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli,
+ AliasAnalysis &aa,
FunctionLoweringInfo &funcinfo)
-...
2014 Jul 21
2
[LLVMdev] LLVM Code Generation on flattened IR code
...ote:
Hello,
I made two flattening transformation filters, one use a switch instruction for the dispatcher, and the other an indirectbranch instruction. Both work well but llc is very time consuming in the second case : 10 minutes for a 500 basic block function, while it takes 10 seconds for the switchcase implementation . The instrumentation of llc shows that most of the time is passed in the Machine Block Frequency Analysis pass
I don't understand why there is so huge difference. Is there a way to speed up llc ?
That’s a bug. Can you try with trunk and provide the LLVM IR test case? You c...