Displaying 19 results from an estimated 19 matches for "svm_exit_excp_base".
2020 Jul 15
2
[PATCH v4 63/75] x86/sev-es: Handle #DB Events
...m_communication)
> struct ghcb *ghcb;
>
> lockdep_assert_irqs_disabled();
> +
> + /*
> + * #DB is special and needs to be handled outside of the intrumentation_begin()/end().
> + * Otherwise the #VC handler could be raised recursivly.
> + */
> + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
> + vc_handle_trap_db(regs);
> + return;
> + }
> +
> instrumentation_begin();
Wait what?! That makes no sense what so ever.
2020 Jul 15
2
[PATCH v4 63/75] x86/sev-es: Handle #DB Events
...m_communication)
> struct ghcb *ghcb;
>
> lockdep_assert_irqs_disabled();
> +
> + /*
> + * #DB is special and needs to be handled outside of the intrumentation_begin()/end().
> + * Otherwise the #VC handler could be raised recursivly.
> + */
> + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
> + vc_handle_trap_db(regs);
> + return;
> + }
> +
> instrumentation_begin();
Wait what?! That makes no sense what so ever.
2020 Feb 11
0
[PATCH 18/62] x86/boot/compressed/64: Setup GHCB Based VC Exception handler
...;
diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h
index 2e8a30f06c74..c68d1618c9b0 100644
--- a/arch/x86/include/uapi/asm/svm.h
+++ b/arch/x86/include/uapi/asm/svm.h
@@ -29,6 +29,7 @@
#define SVM_EXIT_WRITE_DR6 0x036
#define SVM_EXIT_WRITE_DR7 0x037
#define SVM_EXIT_EXCP_BASE 0x040
+#define SVM_EXIT_LAST_EXCP 0x05f
#define SVM_EXIT_INTR 0x060
#define SVM_EXIT_NMI 0x061
#define SVM_EXIT_SMI 0x062
diff --git a/arch/x86/kernel/sev-es-shared.c b/arch/x86/kernel/sev-es-shared.c
index 7edf2dfac71f..f83292c54ab7 100644
--- a/arch/x86/ker...
2020 Jul 14
0
[PATCH v4 63/75] x86/sev-es: Handle #DB Events
...36,16 @@ DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communication)
struct ghcb *ghcb;
lockdep_assert_irqs_disabled();
+
+ /*
+ * #DB is special and needs to be handled outside of the intrumentation_begin()/end().
+ * Otherwise the #VC handler could be raised recursivly.
+ */
+ if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
+ vc_handle_trap_db(regs);
+ return;
+ }
+
instrumentation_begin();
/*
--
2.27.0
2020 Jul 15
0
[PATCH v4 63/75] x86/sev-es: Handle #DB Events
...b;
> >
> > lockdep_assert_irqs_disabled();
> > +
> > + /*
> > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end().
> > + * Otherwise the #VC handler could be raised recursivly.
> > + */
> > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
> > + vc_handle_trap_db(regs);
> > + return;
> > + }
> > +
> > instrumentation_begin();
>
> Wait what?! That makes no sense what so ever.
Then my understanding of intrumentation_begin/end() is wrong, I thought
that the kernel will forbid se...
2020 Aug 24
0
[PATCH v6 64/76] x86/sev-es: Handle #DB Events
...,
struct ghcb *ghcb,
unsigned long exit_code)
@@ -1033,6 +1041,15 @@ DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communication)
struct ghcb *ghcb;
lockdep_assert_irqs_disabled();
+
+ /*
+ * Handle #DB before calling into !noinstr code to avoid recursive #DB.
+ */
+ if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
+ vc_handle_trap_db(regs);
+ return;
+ }
+
instrumentation_begin();
/*
--
2.28.0
2020 Apr 28
0
[PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler
...)
diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h
index 2e8a30f06c74..c68d1618c9b0 100644
--- a/arch/x86/include/uapi/asm/svm.h
+++ b/arch/x86/include/uapi/asm/svm.h
@@ -29,6 +29,7 @@
#define SVM_EXIT_WRITE_DR6 0x036
#define SVM_EXIT_WRITE_DR7 0x037
#define SVM_EXIT_EXCP_BASE 0x040
+#define SVM_EXIT_LAST_EXCP 0x05f
#define SVM_EXIT_INTR 0x060
#define SVM_EXIT_NMI 0x061
#define SVM_EXIT_SMI 0x062
diff --git a/arch/x86/kernel/sev-es-shared.c b/arch/x86/kernel/sev-es-shared.c
index 5927152487ad..22eb3ed89186 100644
--- a/arch/x86/ker...
2020 Jul 15
2
[PATCH v4 63/75] x86/sev-es: Handle #DB Events
...kdep_assert_irqs_disabled();
> > > +
> > > + /*
> > > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end().
> > > + * Otherwise the #VC handler could be raised recursivly.
> > > + */
> > > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
> > > + vc_handle_trap_db(regs);
> > > + return;
> > > + }
> > > +
> > > instrumentation_begin();
> >
> > Wait what?! That makes no sense what so ever.
>
> Then my understanding of intrumentation_begin/end() is wr...
2020 Jul 15
2
[PATCH v4 63/75] x86/sev-es: Handle #DB Events
...kdep_assert_irqs_disabled();
> > > +
> > > + /*
> > > + * #DB is special and needs to be handled outside of the intrumentation_begin()/end().
> > > + * Otherwise the #VC handler could be raised recursivly.
> > > + */
> > > + if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
> > > + vc_handle_trap_db(regs);
> > > + return;
> > > + }
> > > +
> > > instrumentation_begin();
> >
> > Wait what?! That makes no sense what so ever.
>
> Then my understanding of intrumentation_begin/end() is wr...
2020 Feb 11
83
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
Hi,
here is the first public post of the patch-set to enable Linux to run
under SEV-ES enabled hypervisors. The code is mostly feature-complete,
but there are still a couple of bugs to fix. Nevertheless, given the
size of the patch-set, I think it is about time to ask for initial
feedback of the changes that come with it. To better understand the code
here is a quick explanation of SEV-ES first.
2020 Feb 11
83
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
Hi,
here is the first public post of the patch-set to enable Linux to run
under SEV-ES enabled hypervisors. The code is mostly feature-complete,
but there are still a couple of bugs to fix. Nevertheless, given the
size of the patch-set, I think it is about time to ask for initial
feedback of the changes that come with it. To better understand the code
here is a quick explanation of SEV-ES first.
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the fourth version of the SEV-ES Guest Support patches. I
addressed the review comments sent to me for the previous version and
rebased the code v5.8-rc5.
The biggest change in this version is the IST handling code for the
#VC handler. I adapted the entry code for the #VC handler to the big
pile of entry code changes merged into
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the fourth version of the SEV-ES Guest Support patches. I
addressed the review comments sent to me for the previous version and
rebased the code v5.8-rc5.
The biggest change in this version is the IST handling code for the
#VC handler. I adapted the entry code for the #VC handler to the big
pile of entry code changes merged into
2020 Jul 24
86
[PATCH v5 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a rebased version of the latest SEV-ES patches. They are now
based on latest tip/master instead of upstream Linux and include the
necessary changes.
Changes to v4 are in particular:
- Moved early IDT setup code to idt.c, because the idt_descr
and the idt_table are now static
- This required to make stack protector work early (or
2020 Aug 24
96
[PATCH v6 00/76] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is the new version of the SEV-ES client enabling patch-set. It is
based on the latest tip/master branch and contains the necessary
changes. In particular those ar:
- Enabling CR4.FSGSBASE early on supported processors so that
early #VC exceptions on APs can be handled.
- Add another patch (patch 1) to fix a KVM frame-size build
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a new version of the SEV-ES Guest Support patches for x86. The
previous versions can be found as a linked list starting here:
https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/
I updated the patch-set based on ther review comments I got and the
discussions around it.
Another important change is that the early IDT
2020 Sep 07
84
[PATCH v7 00/72] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de>
Hi,
here is a new version of the SEV-ES Guest Support patches for x86. The
previous versions can be found as a linked list starting here:
https://lore.kernel.org/lkml/20200824085511.7553-1-joro at 8bytes.org/
I updated the patch-set based on ther review comments I got and the
discussions around it.
Another important change is that the early IDT
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi,
here is the next version of changes to enable Linux to run as an SEV-ES
guest. The code was rebased to v5.7-rc3 and got a fair number of changes
since the last version.
What is SEV-ES
==============
SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted
State' and means a hardware feature of AMD processors which hides the
register state of VCPUs to the hypervisor by
2020 Apr 28
116
[PATCH v3 00/75] x86: SEV-ES Guest Support
Hi,
here is the next version of changes to enable Linux to run as an SEV-ES
guest. The code was rebased to v5.7-rc3 and got a fair number of changes
since the last version.
What is SEV-ES
==============
SEV-ES is an acronym for 'Secure Encrypted Virtualization - Encrypted
State' and means a hardware feature of AMD processors which hides the
register state of VCPUs to the hypervisor by