Displaying 20 results from an estimated 357 matches for "susan".
2012 Nov 15
5
[LLVMdev] problem trying to write an LLVM register-allocation pass
...sing this flag and it gave me errors on code that otherwise
assembles and runs just fine (using the version of Gcra.cpp that Lang
wrote). So I'm wondering if I should really be using the flag? I'm
using it like this:
llc -verify-machineinstrs -load Debug/lib/P4.so -regalloc=gc xxx.bc
Susan
On 11/15/2012 01:13 PM, Jakob Stoklund Olesen wrote:
>
> On Nov 15, 2012, at 7:53 AM, Susan Horwitz<horwitz at cs.wisc.edu>
> wrote:
>
>> Lang -
>>
>> Attached is a new example for which I still get assembler errors.
>>
>> Susan
>
> Hi Susan,...
2011 Aug 23
2
Can't install program with today's git in 64-bit
...----------------------------------------------------------------------------------------------------<br>I tried using wine setup.exe and then wine64 setup.exe. <br>Used the tab key in both instances. <br>It''s not using the cpu, it''s just idle. <br><br>susan@susan:~$ cd DNS11<br>susan@susan:~/DNS11$ wine setup.exe <br>The program ''wine'' can be found in the following packages:<br> * wine1.2<br> * wine1.3<br> * wine1.0<br>Try: sudo apt-get install <selected package><...
2016 Apr 20
0
Data reshaping with conditions
Hi sri,
As your problem involves a few logical steps, I found it easier to
approach it in a stepwise way. Perhaps there are more elegant ways to
accomplish this.
svdat<-read.table(text="Count id name type
117 335 sally A
19 335 sally A
167 335 sally B
18 340 susan A
56 340 susan A
22 340 susan B
53 340 susan B
135 351 lee A
114 351 lee A
84 351 lee A
80 351 lee A
19 351 lee A
8 351 lee A
21 351 lee A
88 351 lee B
111 351 lee B
46 351 lee B
108 351 lee B",header=TRUE)
# you can also do this with other reshape functions
library(prettyR)
svdatstr<-stret...
2012 Nov 16
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
Jakob pointed out to me that the Gcra.cpp allocator doesn't record
basic-block live-ins, which are used by the verifier to check correctness.
You can record which variables are live into a basic block with
MachineBasicBlock::addLiveIn(unsigned physReg). I don't know the verifier
well, bu...
2016 Apr 20
2
Data reshaping with conditions
Dear All,
I am trying to reshape the data with some conditions. A small part of the
data looks like below. Like this there will be more data with repeating ID.
Count id name type
117 335 sally A
19 335 sally A
167 335 sally B
18 340 susan A
56 340 susan A
22 340 susan B
53 340 susan B
135 351 lee A
114 351 lee A
84 351 lee A
80 351 lee A
19 351 lee A
8 351 lee A
21 351 lee A
88 351 lee B
111 351 lee B
46 351 lee B
108 351 lee B
>From the above data I am expecting an output like below.
id name type count_of_B Max of count B...
2006 Aug 11
2
Getting ViaVoice 10 Pro USB to install
susan@susan:~/.wine/dosdevices/e:$ wine setup.exe
susan@susan:~/.wine/dosdevices/e:$ fixme:seh:check_no_exec No-exec fault triggered at 0x1a082000, enabling work-around
err:ntdll:RtlpWaitForCriticalSection section 0xa5125590 "?" wait timed out in thread 0012, blocked by 0000, retrying (60 sec)...
2015 May 07
2
[LLVMdev] llvm cross compilation and simplescalar simulation for ARM
...e a good choice. But I encounter several problems in the processing of setup the environment.
----------------------------------
1. Firstly, arm toolchain is built via ‘buildroot-2012.08’: arm-linux-gcc, I compile MiBench step by step or on one step as follows:
clang -emit-llvm —target=arm -O3 -c susan.c -o susan.bc
llc -march=arm -filetype=asm susan.bc -o susan.s
arm-linux-gcc -static -L/arm-toolchain/lib/path susan.s -lm -o susan.out
or:
clang -static -gcc-toolchain /arm-toolchain/path -target arm-linux -sysroot=/arm-toolchain/sysroot/path susan.c -o susan.out -lm
but I encounter the problem a...
2016 Apr 21
2
Data reshaping with conditions
...As your problem involves a few logical steps, I found it easier to
> approach it in a stepwise way. Perhaps there are more elegant ways to
> accomplish this.
>
> svdat<-read.table(text="Count id name type
> 117 335 sally A
> 19 335 sally A
> 167 335 sally B
> 18 340 susan A
> 56 340 susan A
> 22 340 susan B
> 53 340 susan B
> 135 351 lee A
> 114 351 lee A
> 84 351 lee A
> 80 351 lee A
> 19 351 lee A
> 8 351 lee A
> 21 351 lee A
> 88 351 lee B
> 111 351 lee B
> 46 351 lee B
> 108 351 lee B",header=TRUE)
> # you can al...
2012 Nov 13
5
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
The problem is that the allocator is re-using the 'preg', which is
calculated for an operand that may have a subreg index, for loads and
stores to a stack-slot. The stack slot always has the same width as vreg
(which is the right behavior), but for operands with subreg indexes,
'preg&...
2012 Nov 11
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
It looks like the bitcode you have attached is corrupted. You should make
sure to attach it as a binary file. Alternatively you can attach the LLVM
assembly as text. You can generate an assembly file from bitcode with:
llvm-dis -o <asm file> <bitcode>
Regards,
Lang.
On Fri, Nov 9,...
2012 Nov 11
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Sorry about that. I created the assembly file and attached it (as
math.txt).
Susan
On 11/11/2012 12:41 AM, Lang Hames wrote:
> Hi Susan,
>
> It looks like the bitcode you have attached is corrupted. You should
> make sure to attach it as a binary file. Alternatively you can attach
> the LLVM assembly as text. You can generate an assembly file from
> bitcode...
2012 Nov 04
3
[LLVMdev] problem trying to write an LLVM register-allocation pass
...o use ssh to copy it from my office
machine to my home laptop. In case that corrupts it, I also put a copy
here:
http://pages.cs.wisc.edu/~horwitz/LANG/tst.bc
I created the file like this:
clang -emit-llvm -O0 -c tst.c -o tst.bc
opt -mem2reg tst.bc > tst.mem2reg
mv tst.mem2reg tst.bc
Susan
On 11/4/2012 3:27 PM, Lang Hames wrote:
> Hi Susan,
>
> I tested the version of Gcra.cpp that I sent you on x86-64 systems
> running MacOS 10.8 and Ubuntu 12.04 (Linux 3.2.0).
>
> Could you send me the bitcode file you're compiling? Different
> bitcodes (due to different...
2012 Nov 05
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
...uction requiring REX prefix.
bug1.bc is my bitcode version of bug1.c.
The problematic vregs are both in register class 0. One is replaced
with preg 1 and the other with preg 74. Those are both in register
class 0, and are not aliased. Any idea why using those pregs causes
trouble?
Thanks!
Susan
On 11/04/2012 06:19 PM, Lang Hames wrote:
> Hi Susan,
>
> With your bitcode file I am now able to reproduce the issue you're
> seeing. It looks like this is a problem with the naive rewriting from
> virtregs to physregs. It appears that the subreg field of physreg
> operands...
2012 Nov 05
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
With your bitcode file I am now able to reproduce the issue you're seeing.
It looks like this is a problem with the naive rewriting from virtregs to
physregs. It appears that the subreg field of physreg operands is ignored
post-register allocation. In your testcase %vreg11:sub32 is being rewr...
2012 Nov 13
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
...loading/storing from/to that stackframe.
I've attached a simpler version of the test input (now called bug.c)
plus the .bc file and the .s file produced by the new code. When I
assemble and run I get this output:
x: 1001
x: 200
x: 40
x: 8
while the correct output is
x: 1001
x: 100
x: 10
Susan
On 11/13/2012 01:20 AM, Lang Hames wrote:
> Hi Susan,
>
> The problem is that the allocator is re-using the 'preg', which is
> calculated for an operand that may have a subreg index, for loads and
> stores to a stack-slot. The stack slot always has the same width as vreg
>...
2012 Nov 07
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
Sorry for the delayed response. Thanks for the test cases - I'm looking in
to this now.
- Lang.
On Mon, Nov 5, 2012 at 2:58 PM, Susan Horwitz <horwitz at cs.wisc.edu> wrote:
> Hi Lang,
>
> I looked more into one of the problems I'm now having, and I've attached 3
&g...
2012 Nov 14
1
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
The problem now is the usedPregSet. Take the instruction:
%vreg13:sub_32bit<def> = ADD32rr %vreg13:sub_32bit, %EAX<kill>,
%EFLAGS<imp-def,dead>
%EAX will be added to usedPregSet when the instruction is encountered, but
%vreg13 is a different class (64bit registers), so none of...
2016 Apr 21
0
Data reshaping with conditions
...re closely at your initial message, I see that you wanted _all_
values of A with respect to maxB in x and y. The error with maximum
values was due to a typo. Perhaps this will do what you want:
svdat<-read.table(text="Count id name type
117 335 sally A
19 335 sally A
167 335 sally B
18 340 susan A
56 340 susan A
22 340 susan B
53 340 susan B
135 351 lee A
114 351 lee A
84 351 lee A
80 351 lee A
19 351 lee A
8 351 lee A
21 351 lee A
88 351 lee B
111 351 lee B
46 351 lee B
108 351 lee B",header=TRUE)
# you can also do this with other reshape functions
library(prettyR)
svdatstr<-stret...
2012 Nov 03
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
..." register allocator, not the naive one I sent you) I
get assembly that includes
%r8d
which seems to be invalid for a 32-bit machine. Sigh. It looks to me
like there's a problem with the LLVM-3.1 API for register allocation
and/or the code-generation phase. What do you think?
Susan
On 11/1/2012 5:28 PM, Lang Hames wrote:
> Hi Susan,
>
> Without debugging symbols I can't make much out of that stack trace
> I'm afraid.
>
> I've attached my modified version of Gcra.cpp. I built llvm 3.1 by
> dropping this file into lib/CodeGen, and adding refe...
2012 Nov 08
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan,
In x86-64 the REX prefix must be used to access an extended register
(r8-r15 and their aliases), but cannot be used when accessing the high byte
of the ABCD regs (AH, BH, CH, DH). In your test case you have hardcoded
%vreg1 to R8B, and %vreg15 to AH, and the test case contains a copy between
thes...