Displaying 19 results from an estimated 19 matches for "supoorting".
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suporting
2016 Nov 15
2
Dwarf.h & Dwarf.def & Dwarf.cpp doesn't belong to Supoort, belogns to DebugInfo.
--
此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo
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2011 Feb 22
1
Powerware 9355 supoort?
Hi all
We're considering getting some Powerware 9355-30-M-0 UPSes to replace some older ones, so I wonder if it would be possible to use NUT for this. It seems 9315 is supported, but AFAICS that's the top model.
Thanks
roy
--
Roy Sigurd Karlsbakk
(+47) 97542685
roy at karlsbakk.net
http://blogg.karlsbakk.net/
--
I all pedagogikk er det essensielt at pensum presenteres intelligibelt. Det
2016 Jul 05
2
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
Hi Xinhui,
2016-06-28 22:43 GMT+08:00 Pan Xinhui <xinhui.pan at linux.vnet.ibm.com>:
> This is to fix some lock holder preemption issues. Some other locks
> implementation do a spin loop before acquiring the lock itself. Currently
> kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
> as parameter and return true if the cpu is preempted. Then kernel can
2016 Jul 05
2
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
Hi Xinhui,
2016-06-28 22:43 GMT+08:00 Pan Xinhui <xinhui.pan at linux.vnet.ibm.com>:
> This is to fix some lock holder preemption issues. Some other locks
> implementation do a spin loop before acquiring the lock itself. Currently
> kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
> as parameter and return true if the cpu is preempted. Then kernel can
2005 Dec 02
1
[LLVMdev] RFC: Plugable intrinsics
I can think of many people that use LLVM and maintain out of tree
extentions that will likely never be incorporated into mainline.
Maintaining out of tree intrnisics takes a fair amount of work and leads
to the choice of using a single version of LLVM for a project (and thus
have to manually incorporate bug fixes) or risk untimely breakage. I
propose that the plugin be extended to allow plugable
2016 Jul 06
1
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
On Tue, 2016-06-28 at 10:43 -0400, Pan Xinhui wrote:
> This is to fix some lock holder preemption issues. Some other locks
> implementation do a spin loop before acquiring the lock itself. Currently
> kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
^^ takes
> as parameter and return true if the cpu is preempted. Then kernel can break
> the spin
2016 Jul 06
1
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
On Tue, 2016-06-28 at 10:43 -0400, Pan Xinhui wrote:
> This is to fix some lock holder preemption issues. Some other locks
> implementation do a spin loop before acquiring the lock itself. Currently
> kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
^^ takes
> as parameter and return true if the cpu is preempted. Then kernel can break
> the spin
2016 Jun 28
0
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
This is to fix some lock holder preemption issues. Some other locks
implementation do a spin loop before acquiring the lock itself. Currently
kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
as parameter and return true if the cpu is preempted. Then kernel can break
the spin loops upon on the retval of vcpu_is_preempted.
As kernel has used this interface, So lets
2016 Jul 06
0
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
Hi, wanpeng
On 2016?07?05? 17:57, Wanpeng Li wrote:
> Hi Xinhui,
> 2016-06-28 22:43 GMT+08:00 Pan Xinhui <xinhui.pan at linux.vnet.ibm.com>:
>> This is to fix some lock holder preemption issues. Some other locks
>> implementation do a spin loop before acquiring the lock itself. Currently
>> kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
2008 Aug 02
0
SARIMA Model confrimation
Hi..
R Program is shown ARIMA output as below then SARIMA equation is be
(1 - 0.991B^{12})z_t + 43.557 = (1+0.37B)(1-0,915B^{12})a_t
But I try to calculate it by manual . It look like it 's big different from R sofeware,
I am not sure this equation is correct or not . PLS supoort me to confirm it
Arima Model ( 0,0,1)(1,0,1)
No Transformation
Constant >> 43.557 , t = 10.09
2005 Nov 16
0
Padlock support, OpenSSL engines etc.
...eration of the VIA Nehemiah and
> > Ezra processors gets used, as found on VIA Epia boards.
> [...]
>
> Thanks, patch is applied!
That's quick!
It just occured to me, OpenVPN has a config option to load specific
OpenSSL engines. Furthermore in the future OpenSSL is said to be
supoorting a "default engine", so that applications will not need to
specify them themselves.
What I'm trying to say, I'm not at all sure if this patch I sent was the
way to go, I simply wanted my Padlock support to work :)
--
Andreas [ http://unstable.nl | xmpp:andreas@uns...
2005 Oct 01
1
OT: RHEL / CentOS Enable APIC
Hello!
I'm setting up Asterisk on a new system. In the past, all of my Asterisk
boxes have either been embedded-style systems that do not supoort APIC, or
multi-processor systems where APIC comes along with SMP. However, now I'm
trying to install Asterisk on a single CPU (and non-HT) system that does
support APIC (A P4 Northwood an Intel 845 chipset).
I've used both RHEL3 and
2016 Jun 28
11
[PATCH v2 0/4] implement vcpu preempted check
change fomr v1:
a simplier definition of default vcpu_is_preempted
skip mahcine type check on ppc, and add config. remove dedicated macro.
add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner.
add more comments
thanks boqun and Peter's suggestion.
This patch set aims to fix lock holder preemption issues.
test-case:
perf record -a perf bench sched messaging -g
2016 Jun 28
11
[PATCH v2 0/4] implement vcpu preempted check
change fomr v1:
a simplier definition of default vcpu_is_preempted
skip mahcine type check on ppc, and add config. remove dedicated macro.
add one patch to drop overload of rwsem_spin_on_owner and mutex_spin_on_owner.
add more comments
thanks boqun and Peter's suggestion.
This patch set aims to fix lock holder preemption issues.
test-case:
perf record -a perf bench sched messaging -g
2005 Jul 18
3
Codecs and bandwidth
Hi Friends,
Something I'd like to shed some light on if possible - how is it that a
single ISDN conversation only uses 64K for bidirectional communication
(using ulaw, correct?), but on several occasions now have seen
references to ulaw voip conversations using 64K per side of the
conversation, plus packet overhead
(http://www.zytrax.com/tech/protocols/voip_rates.htm - seems to be down
2016 Jul 06
2
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
Cc Paolo, kvm ml
2016-07-06 12:58 GMT+08:00 xinhui <xinhui.pan at linux.vnet.ibm.com>:
> Hi, wanpeng
>
> On 2016?07?05? 17:57, Wanpeng Li wrote:
>>
>> Hi Xinhui,
>> 2016-06-28 22:43 GMT+08:00 Pan Xinhui <xinhui.pan at linux.vnet.ibm.com>:
>>>
>>> This is to fix some lock holder preemption issues. Some other locks
>>> implementation
2016 Jul 06
2
[PATCH v2 2/4] powerpc/spinlock: support vcpu preempted check
Cc Paolo, kvm ml
2016-07-06 12:58 GMT+08:00 xinhui <xinhui.pan at linux.vnet.ibm.com>:
> Hi, wanpeng
>
> On 2016?07?05? 17:57, Wanpeng Li wrote:
>>
>> Hi Xinhui,
>> 2016-06-28 22:43 GMT+08:00 Pan Xinhui <xinhui.pan at linux.vnet.ibm.com>:
>>>
>>> This is to fix some lock holder preemption issues. Some other locks
>>> implementation
2011 Aug 11
6
unable to mount zfs file system..pl help
# uname -a
Linux testbox 2.6.18-194.el5 #1 SMP Tue Mar 16 21:52:39 EDT 2010 x86_64 x86_64 x86_64 GNU/Linux
# rpm -qa|grep zfs
zfs-test-0.5.2-1
zfs-modules-0.5.2-1_2.6.18_194.el5
zfs-0.5.2-1
zfs-modules-devel-0.5.2-1_2.6.18_194.el5
zfs-devel-0.5.2-1
# zfs list
NAME USED AVAIL REFER MOUNTPOINT
pool1 120K 228G 21K /pool1
pool1/fs1 21K 228G 21K /vik
[root at
2020 Jul 17
0
Wine release 5.13
The Wine development release 5.13 is now available.
What's new in this release (see below for details):
- Re-mapping of INI files to the registry.
- System call thunks in NTDLL.
- Reimplementation of floating point numbers printing.
- Beginnings of a restructuration of the console support.
- Various bug fixes.
The source is available from the following locations: