search for: sufffic

...The name "getSizeExpressionInBits" makes me think that a Value > expression will be returned (something like a ConstantExpr that uses > vscale). I would be surprised to get a pair of integers back. Do > clients actually need constant integer values or would a ConstantExpr > sufffice? We could add a ConstantVScale or something to make it work. I agree the name is not ideal and I'm open to suggestions -- I was thinking of the two integers representing the known-at-compile-time terms in an expression: '(scaled_bits * vscale) + unscaled_bits'. Assuming the pair is...

...nInBits" makes me think that a Value >>> expression will be returned (something like a ConstantExpr that uses >>> vscale). I would be surprised to get a pair of integers back. Do >>> clients actually need constant integer values or would a ConstantExpr >>> sufffice? We could add a ConstantVScale or something to make it work. >> >> I agree the name is not ideal and I'm open to suggestions -- I was thinking of the two >> integers representing the known-at-compile-time terms in an expression: >> '(scaled_bits * vscale) + unscal...

Hi, Now that Sander has committed enough MC support for SVE, here's an updated RFC for variable length vector support with a set of 14 patches (listed at the end) to demonstrate code generation for SVE using the extensions proposed in the RFC. I have some ideas about how to support RISC-V's upcoming extension alongside SVE; I'll send an email with some additional comments on