search for: subvalue

Displaying 7 results from an estimated 7 matches for "subvalue".

Did you mean: subvalues
2007 Apr 23
2
[LLVMdev] Register based vector insert/extract
...ers()/getSuperRegisters() to MRegisterInfo. This is what's needed in order to implement the register allocation constraint, but there's no way yet to pass the constraint through the operands from the DAG. There would need to be some way to specify that the SDOperand is referencing a subvalue of the produced value (perhaps a subclass of SDOperand?). This would allow the register allocator to try to use the sub/super register sets to perform the instert/extract. Is any of this kind of work planned? The addition of those MRegisterInfo functions has me curious... -- Christopher L...
2007 Apr 23
0
[LLVMdev] Register based vector insert/extract
On Apr 23, 2007, at 1:17 PM, Christopher Lamb wrote: > > On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote: > >> On Mon, 23 Apr 2007, Christopher Lamb wrote: >>> How can one let the back end know how to insert and extract >>> elements of >>> a vector through sub-register copies? I'm at a loss how to do >>> this... >> >> You
2007 Apr 23
2
[LLVMdev] Register based vector insert/extract
On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote: > On Mon, 23 Apr 2007, Christopher Lamb wrote: >> How can one let the back end know how to insert and extract >> elements of >> a vector through sub-register copies? I'm at a loss how to do this... > > You probably want to custom lower the insertelement/extractelement > operations for the cases you support.
2007 Apr 23
0
[LLVMdev] Register based vector insert/extract
...erRegisters() to > MRegisterInfo. This is what's needed in order to implement the > register allocation constraint, but there's no way yet to pass the > constraint through the operands from the DAG. There would need to be > some way to specify that the SDOperand is referencing a subvalue of > the produced value (perhaps a subclass of SDOperand?). This would > allow the register allocator to try to use the sub/super register > sets to perform the instert/extract. Right. Evan is currently focusing on getting the late stages of the code generator (e.g. livevars) to be able...
2013 Dec 24
2
[LLVMdev] running clang format on the Mips target
Hi David, I agree with you that it would be rude to simply clang-format the MIPS backend without coordination with any out-of-tree derivatives. To be honest, it hadn't occurred to me that there would be any such derivatives and the possibility wasn't raised in our internal discussion before we brought the subject up on this list. I'm keen to coordinate with such derivatives to
2007 Mar 27
3
Bridging R to OpenOffice
Dear members of the R Development Team, I am looking for people with a deep understanding of R internals to assist in bridging R to OpenOffice. While R is a state of the art statistical environment, less experienced users often find it difficult to work with R. Therefore, I believe that a bridge between R and a spreadsheet program will make this transition less painful. I sincerely believe
2017 Dec 19
3
Register Allocation Graph Coloring algorithm and Others
Hi Leslie, I suggest adding these 3 papers to your reading list. Register allocation for programs in SSA-form Sebastian Hack, Daniel Grund, and Gerhard Goos http://www.rw.cdl.uni-saarland.de/~grund/papers/cc06-ra_ssa.pdf Simple and Efficient Construction of Static Single Assignment Form Matthias Braun , Sebastian Buchwald , Sebastian Hack , Roland Leißa , Christoph Mallon , and Andreas