search for: subui

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2009 Jul 06
1
[LLVMdev] Mips -> DLX Modifications as Target
...ith respect to the following (Note: I have already changed ADDui from ADDiu) We have this def ADDui : ArithI<0x09, "addui", add, simm16, immSExt16>; However sticky speaking this should be in dlx the instructions are addui rk, ri, Kuns (Where Kusn is unsigned) Likewise DLX has a subui rk, ri, Kusn. (Mips does not) Thus they should be: def ADDui : ArithI<0x09, "addui", add, simm16, immZExt16>; def SUBui : ArithI<0x23, "subui", sub, simm16, immZExt16>; However I am not sure how or where to setup in the Target Descriptor of the Instructions or...
2015 Nov 23
3
Qs about TwoOperandAliasConstraint and TIED_TO
in llvm-3.6.2.src 1. when I put this around one of my instruction definitions in my target "InstrInfo.td" file, let TwoOperandAliasConstraint = "$dst = $rs1" in { } I do not see any TIED_TO in the generated GenInstrInfo.inc file for the OperandInfo used by the instruction, the question is what am I doing wrong ? 2. I've noticed that TwoOperandAliasConstraint