Displaying 6 results from an estimated 6 matches for "subregset".
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subregs
2008 Oct 15
3
[LLVMdev] INSERT_SUBREG node.
...ister, idx relationship.
> >> See X86RegisterInfo.td:
> >>
> >> def x86_subreg_8bit : PatLeaf<(i32 1)>;
> >> def x86_subreg_16bit : PatLeaf<(i32 2)>;
> >> def x86_subreg_32bit : PatLeaf<(i32 3)>;
> >>
> >> def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
> >> R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W],
> >> [AL, CL, DL, BL, SPL, BPL, SIL, DIL,
> >> R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>;
> >>
> &g...
2008 Oct 15
2
[LLVMdev] INSERT_SUBREG node.
...g wrote:
> You need to specify sub-register == super-register, idx relationship.
> See X86RegisterInfo.td:
>
> def x86_subreg_8bit : PatLeaf<(i32 1)>;
> def x86_subreg_16bit : PatLeaf<(i32 2)>;
> def x86_subreg_32bit : PatLeaf<(i32 3)>;
>
> def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
> R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W],
> [AL, CL, DL, BL, SPL, BPL, SIL, DIL,
> R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>;
>
> I admit the way it's specified...
2008 Oct 15
0
[LLVMdev] INSERT_SUBREG node.
...o specify sub-register == super-register, idx relationship.
>> See X86RegisterInfo.td:
>>
>> def x86_subreg_8bit : PatLeaf<(i32 1)>;
>> def x86_subreg_16bit : PatLeaf<(i32 2)>;
>> def x86_subreg_32bit : PatLeaf<(i32 3)>;
>>
>> def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
>> R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W],
>> [AL, CL, DL, BL, SPL, BPL, SIL, DIL,
>> R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>;
>>
>> I admit the way it...
2008 Oct 14
0
[LLVMdev] INSERT_SUBREG node.
You need to specify sub-register == super-register, idx relationship.
See X86RegisterInfo.td:
def x86_subreg_8bit : PatLeaf<(i32 1)>;
def x86_subreg_16bit : PatLeaf<(i32 2)>;
def x86_subreg_32bit : PatLeaf<(i32 3)>;
def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W],
[AL, CL, DL, BL, SPL, BPL, SIL, DIL,
R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>;
I admit the way it's specified is not very elegant. We&...
2008 Oct 13
2
[LLVMdev] INSERT_SUBREG node.
On Thu, 2008-10-02 at 11:19 -0700, Evan Cheng wrote:
>
> On Oct 2, 2008, at 11:02 AM, Sanjiv.Gupta at microchip.com wrote:
>
> > What’s the value produced by an INSERT_SUBREG node? Is it a chain?
>
>
> No, insert_subreg returns a value:
>
>
> v1 = insert_subreg v2, v3, idx
>
>
> v1 and v2 will have the same type, e.g. i16, and v3 must have a
>
2008 Oct 16
0
[LLVMdev] INSERT_SUBREG node.
...uot;PIC16", [i16], 8, [FSR0, FSR1]> {
> let SubRegClassList = [FSR8, FSR8]; // HERE.
> }
This is a bug, probably in tablegen. Unfortunately I don't have the
time to fix it. But please file a bug about this. Hopefully someone
will fix it soon.
Thanks,
Evan
>
>
> SubRegSet : <1, [FSR0, FSR1], [FSR0L, FSR0H]>;
> SubRegSet : <2, [FSR0, FSR1], [FSR0H, FSR0L]>;
>
>
> I think the fundamental problem we have there is that we are using
> SubIdx for both purposes: 1. to enumerate over subregister
> classses, 2.
> To enumerate subregs of th...