Displaying 3 results from an estimated 3 matches for "subreg_targetflag".
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subreg_targetflags
2015 Apr 28
2
[LLVMdev] RFC: Machine Level IR text-based serialization format
..., but I'm
not 100% sure).
- IsUndef, IsImp, IsKill, IsDead, IsInternalRead, IsDebug - keywords like
'implicit', 'undef', 'kill', 'dead' are used before the register e.g.
'undef %rax', 'implicit-def kill %eflags'.
I don't have a syntax for the SubReg_TargetFlags at the moment.
Alex
>
> - ....
>
> ....
>
> - bb: 1
>
> llbb: '%4'
>
> successors: [ 'bb#2' ]
>
> instructions:
>
> - '%edi = mov32rm %rsp, 1, %noreg, 4, %noreg'
>...
2015 Apr 28
2
[LLVMdev] RFC: Machine Level IR text-based serialization format
...gt; - IsUndef, IsImp, IsKill, IsDead, IsInternalRead, IsDebug - keywords like
>> 'implicit', 'undef', 'kill', 'dead' are used before the register e.g.
>> 'undef %rax', 'implicit-def kill %eflags'.
>> I don't have a syntax for the SubReg_TargetFlags at the moment.
>
> Since the instruction format is partially based on the machine dump format,
> you could use something similar to that, like '%reg:subreg'.
>
> On an tangential note, IIRC the machine dumps store the virtual register
> information (register class, main...
2015 Apr 28
9
[LLVMdev] RFC: Machine Level IR text-based serialization format
Hi all,
I would like to propose a text-based, human readable format that will be used to
serialize the machine level IR. The major goal of this format is to allow LLVM
to save the machine level IR after any code generation pass and then to load
it again and continue running passes on the machine level IR. The
primary use case
of this format is to enable easier testing process for the code