search for: suboperands

Displaying 3 results from an estimated 3 matches for "suboperands".

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2014 Jan 15
2
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
On Tue, 2014-01-14 at 22:59 -0800, Craig Topper wrote: > I started trying to fix this tonight but it's pretty nasty to fix. > I'll try to make another go at it later this week. Much of it seems fixed already; what's left to fix? The segment prefix override? Does that mean we get to fix disassembly of '0x65 0xa4' while we're at it? (Although we can't even
2018 Feb 25
0
CodeEmitterGen generates wrong code for getBinaryCodeForInstr
Hi, It seems like CodeEmitterGen gets confused when we use named suboperands. sample code: def memsrc : Operand<i16> { let PrintMethod = "printSrcMemOperand"; let MIOperandInfo = (ops GR16:$ra, i16imm:$imm_i16); let ParserMatchClass = memAsmOperand; } def LOAD16m : Inst32rri<0x0, (outs GR16:$rb), (ins memsrc:$src2), "...
2014 Jan 16
2
[LLVMdev] Some bugs in x86 disasm (llvm-mc)
I believe I have now fixed the 0x64 0xa1 0x00 0x00 0x00 0x00 bug in r199364. On Wed, Jan 15, 2014 at 10:53 AM, Craig Topper <craig.topper at gmail.com>wrote: > To fix it we need to change offset8/offset16/etc to have two suboperands > and update the printer to understand that. Also update the disassembler to > add the segment to the MCInst when its creating it. When I did these two > things the MCCodeEmitter broke because it tried to interpret the extra > operand as an immediate. I think I probably need to change t...