Displaying 20 results from an estimated 61 matches for "subop".
2014 Jun 03
8
[PATCH v2 0/4] Constant folding of new Instructions
And another try for constant folding of Instructions for nvc0.
Please Review this!
Thanks,
Tobias Klausmann
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant expressions
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 50 +...
2014 May 29
2
[PATCH 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions
...case TYPE_S32: res.data.s32 = (a->data.s32 << lshift) >> rshift; break;
- case TYPE_U32: res.data.u32 = (a->data.u32 << lshift) >> rshift; break;
+ case TYPE_S32: {
+ res.data.s32 = (res.data.s32 << lshift) >> rshift;
+ if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
+ res.data.s32 = util_bitreverse(res.data.s32);
+ break;
+ }
+ case TYPE_U32: {
+ res.data.u32 = (res.data.u32 << lshift) >> rshift;
+ if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
+ res.data.u32 = util_bi...
2014 Jun 03
6
[PATCH v3 0/4] Constant folding of new Instructions
Yet another try for constant folding of Instructions for nvc0.
Please Review this again! (Hopefully the last time ;-) )
Tobias Klausmann (4):
nvc0/ir: clear subop when folding constant expressions
nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
nvc0/ir: Handle OP_BFIND when folding constant expressions
nvc0/ir: Handle OP_POPCNT when folding constant expressions
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 41 +...
2014 May 29
1
[PATCH 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions
...gt;data.s32 << lshift) >> rshift; break;
>> - case TYPE_U32: res.data.u32 = (a->data.u32 << lshift) >> rshift; break;
>> + case TYPE_S32: {
>> + res.data.s32 = (res.data.s32 << lshift) >> rshift;
>> + if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
>> + res.data.s32 = util_bitreverse(res.data.s32);
>> + break;
>> + }
>> + case TYPE_U32: {
>> + res.data.u32 = (res.data.u32 << lshift) >> rshift;
>> + if (i->subOp == NV50_I...
2014 Jun 23
2
[Mesa-dev] [PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions
Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> writes:
> Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
> After folding, make sure that it is cleared
>
> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
> Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.1 10.2" <mesa-stable at lists.freedesktop.org>
Hi Tobias and Ilia,...
2014 May 29
0
[PATCH 1/4] nvc0/ir: clear subop when folding constant expressions
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cp...
2014 May 29
0
[PATCH 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions
....data.s32 = (a->data.s32 << lshift) >> rshift; break;
> - case TYPE_U32: res.data.u32 = (a->data.u32 << lshift) >> rshift; break;
> + case TYPE_S32: {
> + res.data.s32 = (res.data.s32 << lshift) >> rshift;
> + if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
> + res.data.s32 = util_bitreverse(res.data.s32);
> + break;
> + }
> + case TYPE_U32: {
> + res.data.u32 = (res.data.u32 << lshift) >> rshift;
> + if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
>...
2014 Jun 03
0
[PATCH v2 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions
...lshift = 32 - width - offset;
}
switch (i->dType) {
- case TYPE_S32: res.data.s32 = (a->data.s32 << lshift) >> rshift; break;
- case TYPE_U32: res.data.u32 = (a->data.u32 << lshift) >> rshift; break;
+ case TYPE_S32:
+ if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
+ res.data.s32 = util_bitreverse(a->data.s32);
+ else
+ res.data.s32 = a->data.s32;
+ res.data.s32 = (res.data.s32 << lshift) >> rshift;
+ break;
+ case TYPE_U32:
+ if (i->subOp == NV50_IR_SU...
2014 Jun 03
0
[PATCH v2 1/4] nvc0/ir: clear subop when folding constant expressions
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cp...
2014 Jun 03
0
[PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git...
2014 Jun 23
0
[Mesa-dev] [PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions
On Mon, Jun 23, 2014 at 7:25 PM, Carl Worth <cworth at cworth.org> wrote:
> Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> writes:
>> Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
>> After folding, make sure that it is cleared
>>
>> Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
>> Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
> Cc: "10.1 10.2" <mesa-stable at lists.freedesktop.org>
&...
2014 May 29
4
Add constant folding for new opcodes
Hi,
please review the following 4 patches:
1b1cfc6 nvc0/ir: Handle OP_BFIND when folding constant expressions
d2d2727 nvc0/ir: Handle OP_POPCNT when folding constant expressions
86a1ee6 nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
84563bf nvc0/ir: clear subop when folding constant expressions
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 39
+++++++++++++++++++++++++++++++++++++--
1 file changed, 37 insertions(+), 2 deletions(-)
Thanks,
Tobias Klausmann
2017 Dec 20
2
[PATCH] gm107/ir: use lane 0 for manual textureGrad handling
...v coordinates from lane l to all lanes
for (c = 0; c < dim; ++c) {
- bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array),
- bld.mkImm(l), bld.mkImm(SHFL_BOUND_QUAD));
- add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], crd[c], zero);
- add->subOp = 0x00;
- add->lanes = 1; /* abused for .ndv */
+ bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), lane, quad);
}
// add dPdx from lane l to lanes dx
for (c = 0; c < dim; ++c) {
- bld.mkOp3(OP_SHFL, TYPE_F32, tmp, i->dPdx[c].get()...
2012 Nov 28
0
[PATCH v8 2/2] tools: XENMEM_claim_pages (subop of existing) hypercall
This is patch 2of2 of an eighth cut of the patch of the proposed
XENMEM_claim_pages hypercall/subop, taking into account
feedback from Jan and Keir and IanC and Matthew Daley.
As requested by Jan, this is a separate post of the tools
part of the patch. NOTE: This patch must be applied after
the hypervisor part of the patchset or otherwise may break
the build!
v5->v8:
- no change in this pat...
2016 Jan 28
2
Specifying DAG patterns in the instruction
I'm confused about how to specify DAG patterns for a given instruction
Here is an example for my target
class ALU1_RR<bits<4> subOp, string asmstr, SDNode OpNode>
: ALU_RR<subOp, asmstr,
[(set GPR:$rD, (OpNode (i32 GPR:$rA), (i32 GPR:$rB)))]>;
def ADD : ALU1_RR<0x0, "l.add", add>;
The set operation simply creates a list. The add operation creates a union.
So at the end [(set GPR:$rD, (O...
2016 Mar 30
3
infer correct types from the pattern
i'm getting a
Could not infer all types in pattern!
error in my backend. it is happening on the following instruction:
VGETITEM: (set GPR:{i32:f32}:$rD, (extractelt:{i32:f32}
VR:{v4i32:v4f32}:$rA, GPR:i32:$rB)).
how do i make it use appropriate types? in other words if it is f32 then
use v4v32 and if it is i32 then use v4f32. i'm not sure even where to start?
any help is appreciated.
2016 Mar 16
2
[PATCH mesa 5/6] nouveau: codegen: Add support for OpenCL global memory buffers
...> + code[0] = 0x00000000;
> + code[1] = 0xe0000000;
> + break;
> + case FILE_MEMORY_LOCAL:
> + code[0] = 0x00000002;
> + code[1] = 0x7a800000;
> + break;
> case FILE_MEMORY_SHARED:
> code[0] = 0x00000002;
> if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
> @@ -1678,7 +1685,8 @@ CodeEmitterGK110::emitSTORE(const Instruction *i)
>
> srcId(i->src(1), 2);
> srcId(i->src(0).getIndirect(0), 10);
> - if (i->src(0).getFile() == FILE_MEMORY_BUFFER &&
> + if ((i->src(0).getF...
2017 Dec 20
0
[PATCH] gm107/ir: use lane 0 for manual textureGrad handling
...to all lanes
> for (c = 0; c < dim; ++c) {
> - bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array),
> - bld.mkImm(l), bld.mkImm(SHFL_BOUND_QUAD));
> - add = bld.mkOp2(OP_QUADOP, TYPE_F32, crd[c], crd[c], zero);
> - add->subOp = 0x00;
> - add->lanes = 1; /* abused for .ndv */
> + bld.mkOp3(OP_SHFL, TYPE_F32, crd[c], i->getSrc(c + array), lane, quad);
> }
>
> // add dPdx from lane l to lanes dx
> for (c = 0; c < dim; ++c) {
> - bld.mkOp3(OP_SHFL, T...
2016 Mar 16
13
[PATCH mesa 1/6] tgsi_build: Fix return of uninitialized memory in tgsi_*_instruction_memory
tgsi_default_instruction_memory / tgsi_build_instruction_memory were
returning uninitialized memory for tgsi_instruction_memory.Texture and
tgsi_instruction_memory.Format. Note 0 means not set, and thus is a
correct default initializer for these.
Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory")
Cc: Nicolai Hähnle <nicolai.haehnle at amd.com>
2016 Jan 29
2
Specifying DAG patterns in the instruction
...On Thu, Jan 28, 2016 at 7:33 PM, Rail Shafigulin via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> I'm confused about how to specify DAG patterns for a given instruction
>>
>> Here is an example for my target
>>
>> class ALU1_RR<bits<4> subOp, string asmstr, SDNode OpNode>
>> : ALU_RR<subOp, asmstr,
>> [(set GPR:$rD, (OpNode (i32 GPR:$rA), (i32 GPR:$rB)))]>;
>>
>> def ADD : ALU1_RR<0x0, "l.add", add>;
>>
>> The set operation simply creates a list. The add operati...