Displaying 3 results from an estimated 3 matches for "subdag".
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2008 Jun 11
1
[LLVMdev] Variable length condition code for SETCC and SELECT?
...of any suggestions or ideas, it's off to begging
>forgiveness if the patch confuses people and code. :-)
>
>
I like talking to myself... and I've been hacking on a two-pass version
of SelectionDAGLegalize::PromoteOp, where the first pass determines the
maximum type to which the subDAG need to be promoted, and the second
pass then does all of the SDOperand promotions.
However, I'm starting to notice that I'm having to duplicate switch
statements or add nasty if/then statements having to do with which pass
is currently active. I am starting to think that these promotion
f...
2008 Jun 06
0
[LLVMdev] Variable length condition code for SETCC and SELECT?
B. Scott Michel wrote:
> It'd be easy to hack PromoteOp to make a pass to determine all operands'
> promoted value types, take the max, then figure out some way to
> re-promote them to maximal promoted value type. Except that this is a
> non-optimal solution requiring PromoteOp to potentially traverse the
> operand tree twice.
>
> Any suggestions or ideas?
>
2008 Jun 06
3
[LLVMdev] Variable length condition code for SETCC and SELECT?
After a hiatus on the CellSPU development, I've got all of the
instructions necessary to get the llvm-gcc frontend to build. I've now
discovered a new and interesting problem that I'm not sure how to solve
cleanly and it's due to the fact that CellSPU has no fixed size
condition flags. CellSPU's condition flags depend on the size of what's
being compared, i.e., if both