search for: subadd

Displaying 5 results from an estimated 5 matches for "subadd".

2011 Oct 18
0
[LLVMdev] Matching addsub
...gt; BUILD_VECTOR cannot ever be "Legal", and so it is always turned into a > constant load before instruction selection. Trying to keep a vector producer this naive about the target instruction set is awkward. If the vector producer doesn't know whether the target has an addsub or subadd instruction, how is it to know the best way to expand complex multiplication? It's likely to get suboptimal code in many cases. On the other hand, a producer that knows that the target has certain instructions could pretty easily just use appropriate intrinsics that can be mapped directly to t...
2011 Oct 18
2
[LLVMdev] Matching addsub
...ver be "Legal", and so it is always turned into a > > constant load before instruction selection. > > Trying to keep a vector producer this naive about the target instruction > set is awkward. If the vector producer doesn't know whether the target > has an addsub or subadd instruction, how is it to know the best way to > expand complex multiplication? It's likely to get suboptimal code in many > cases. > > On the other hand, a producer that knows that the target has certain > instructions could pretty easily just use appropriate intrinsics that ca...
2011 Oct 18
0
[LLVMdev] Matching addsub
...quot;, and so it is always turned into a >>> constant load before instruction selection. >> >> Trying to keep a vector producer this naive about the target instruction >> set is awkward. If the vector producer doesn't know whether the target >> has an addsub or subadd instruction, how is it to know the best way to >> expand complex multiplication? It's likely to get suboptimal code in many >> cases. >> >> On the other hand, a producer that knows that the target has certain >> instructions could pretty easily just use appropriat...
2011 Oct 17
4
[LLVMdev] Matching addsub
How should I go about matching floating-point addsub-like vector instructions? My first inclination is to write something which matches build_vector 1.0, -1.0, and then use that in combination with a match on fadd, but that does not seem to work. I think this is because BUILD_VECTOR cannot ever be "Legal", and so it is always turned into a constant load before instruction selection.
2011 Oct 18
1
[LLVMdev] Matching addsub
...s turned into a > >>> constant load before instruction selection. > >> > >> Trying to keep a vector producer this naive about the target instruction > >> set is awkward. If the vector producer doesn't know whether the target > >> has an addsub or subadd instruction, how is it to know the best way to > >> expand complex multiplication? It's likely to get suboptimal code in many > >> cases. > >> > >> On the other hand, a producer that knows that the target has certain > >> instructions could pretty e...