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.../lib/ruby/gems/1.8/gems/activesupport-1.2.4/lib/active_support/dependencies. rb:189:in `const_get'' /usr/lib/ruby/gems/1.8/gems/activesupport-1.2.4/lib/active_support/dependencies. rb:189:in `const_missing'' /usr/lib/ruby/gems/1.8/gems/activesupport-1.2.4/lib/active_support/core_ext/stri ng/../../inflector.rb:149:in `module_eval'' /usr/lib/ruby/gems/1.8/gems/activesupport-1.2.4/lib/active_support/core_ext/stri ng/../../inflector.rb:149:in `module_eval'' /usr/lib/ruby/gems/1.8/gems/activesupport-1.2.4/lib/active_support/core_ext/stri ng/../../inflector.rb:149:in `con...

I'm a bit confused as to how some of the values in a Sparc store instruction actually come to be set. The Sparc backend defines a store as: def STri : F3_2<3, 0b000100, (outs), (ins MEMri:$addr, IntRegs:$src), "st $src, [$addr]", [(store IntRegs:$src, ADDRri:$addr)]>; F3_2 and it's superclasses are defined as follows: class F3_2<bits<2> opVal, bits<6> op3va...

Further to my earlier message, I've now got both the Turlach solution & the Venables solution to work in R0.64.2 The as.name() conversion in the Venables solution is not needed. John Maindonald email : john.maindonald at anu.edu.au Statistical Consulting Unit, phone : (6249)3998 c/o CMA, SMS, fax : (6249)5549 John Dedman Mathematical

Suppose I have a target that does not have register+constant addressing mode. Then, I have DAG like: (store ..., (frameindex)) Targets like SPARC have the following patterns to catch this: def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [frameindex], []>; def STri : F3_2<3, 0b000100, (outs), (ins MEMri:$addr, IntRegs:$src), "st $src, [$addr]", [(store IntRegs:$src, ADDRri:$addr)]>; Where ADDRri will eventually turn into register+constant addressing in assembler. The IA64 target has explici...

...RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target); - RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target); + RegisterTargetMachine<X86_32TargetMachine> Y(TheX86_64Target); } @@ -74,7 +75,7 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, Stri const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : X86TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false), + : X86Targ...

...oes not have register+constant > addressing mode. Then, I have DAG like: > > (store ..., (frameindex)) > > Targets like SPARC have the following patterns to catch this: > > def ADDRri : ComplexPattern<i32, 2, > "SelectADDRri", [frameindex], []>; > def STri : F3_2<3, 0b000100, > (outs), (ins MEMri:$addr, IntRegs:$src), > "st $src, [$addr]", > [(store IntRegs:$src, ADDRri:$addr)]>; > > Where ADDRri will eventually turn into register+constant > addressing in assembler. &g...

...>> addressing mode. Then, I have DAG like: >> >> (store ..., (frameindex)) >> >> Targets like SPARC have the following patterns to catch this: >> >> def ADDRri : ComplexPattern<i32, 2, >> "SelectADDRri", [frameindex], []>; >> def STri : F3_2<3, 0b000100, >> (outs), (ins MEMri:$addr, IntRegs:$src), >> "st $src, [$addr]", >> [(store IntRegs:$src, ADDRri:$addr)]>; >> >> Where ADDRri will eventually turn into register+constant >> add...

On Mon, 2014-01-06 at 14:23 -0800, Jim Grosbach wrote: > Hi David, > > AFAIK, the answer is basically “because it’s always been that way.” I > seem to recall there were some things that were different (data layout > string and such), but that could also be parameterized if it hasn’t > been already by the recent refactorings, I suppose. It is *all* now parameterized. The classes are identical apart from that one true/false... > > @@ -74,7 +75,7 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &amp...

...ennethuil at gmail.com> wrote: >> I think it's more intuitive to have command-line information override >> Module information. That's how llc works, for example. >> >> Also, is the argument to -defaulttarget a triple, an architecture name, >> or a targetdata string? If it's a triple, it'd be nice to be consistent >> with llc and call it -mtriple=. For an architecture name, -march=. >> If it's a targetdata string, perhaps -targetdata= would be a good name. >> >> (As an aside, I wouldn't object to having llc's optio...

On 28.01.2014 12:46, Daniel P. Berrange wrote: > On Tue, Jan 28, 2014 at 12:32:41PM +0100, Jan Olszak wrote: >> Hi there! >> >> I am trying to turn on user namespace by adding following lines to the >> config: >> >> >> >> <idmap> >> >> <uid start='0' target='0' count='100000'/> >>

Hi there! I am trying to turn on user namespace by adding following lines to the config: <idmap> <uid start='0' target='0' count='100000'/> <gid start='0' target='0' count='100000'/> </idmap> As you can see the root in container is mapped to the root outside. I was expected to see no difference

...jLjLongJmp(MI, BB); + } } *************** *** 3114,3119 **** --- 3142,3352 ---- return BB; } + MachineBasicBlock* SparcTargetLowering:: + emitEHSjLjLongJmp(MachineInstr *MI, + MachineBasicBlock *MBB) const + { + DebugLoc DL = MI->getDebugLoc(); + const TargetInstrInfo *TII = Subtarget->getInstrInfo(); + + MachineFunction *MF = MBB->getParent(); + MachineRegisterInfo &MRI = MF->getRegInfo(); + MachineInstrBuilder MIB; + + // Memory Reference + MachineInstr::mmo_iterator MMOBegin = MI->memoperands_begin(); + MachineInstr::mmo_iterato...

Hey folks, I''m just starting out learning Rails, so I picked up "Agile Web Development with Rails" and tried to get a demo server going. I entered the command C:\Sites\demo>rails server and got the following messages: => Booting WEBrick => Rails 3.0.7 application starting in development on http://0.0.0.0:3000 => Call with -d to detach => Ctrl-C to shutdown

>> Anyway, my present plan of attack is to have a "-defaulttarget" option >> with "none", "host", or a target string.  If -defaulttarget is not >> specified, the behavior of "opt" will be the same as it is presently. >> The defaulttarget will be overridden by the Module's target data if it >> has some.  "none" means that no TargetData pass will be added unless >>...

...e the Sparc back-end). My architecture has special address-registers and I want to add such new address-registers to my Sparc back-end. 1) I defined a new register call AddrRegs 2) I registered the class AddrRegs (addRegisterClass(MVT::iPTR, .. )) 3) I added method addPointerRegClass() to my InstrInfo class The compiler generates the some code as before, but that seems to be ok, because I haven't used ptr_rc yet. 4) I changed the address mode MEMri: def MEMri : Operand<iPTR> { let PrintMethod = "printMemOperand"; // was: let MIOperandInfo = (ops IntRegs, i32im...

...ittle test: <%= text_field_with_auto_complete :employees, :nom%> # controller class... auto_complete_for ||:employees, :nom def uneAutreMethode ... end||| end I use a database with a table: "employees" and a column "nom" Merci. moufid -- Moufid Zeribi www.stri.net Tel: +33 6 68 03 11 40 _______________________________________________ Rails-spinoffs mailing list Rails-spinoffs-1W37MKcQCpIf0INCOvqR/iCwEArCW2h5@public.gmane.org http://lists.rubyonrails.org/mailman/listinfo/rails-spinoffs

On Tue, Jan 28, 2014 at 12:32:41PM +0100, Jan Olszak wrote: > Hi there! > > I am trying to turn on user namespace by adding following lines to the > config: > > > > <idmap> > > <uid start='0' target='0' count='100000'/> > > <gid start='0' target='0' count='100000'/> > >

Good afternoon I would like to ask if is possible somehow give more relevance to the recent documents in search results. I dont want to sort results according to the date, I still prefer relevance, but I would like to see recent documents with better scoring. I was trying to add search query using AND_MAYBE, which should use relevance from both subqueries, but it didnt add any benefit to the

...t; My architecture has special address-registers and I want to add such > new address-registers to my Sparc back-end. > > 1) I defined a new register call AddrRegs > 2) I registered the class AddrRegs (addRegisterClass(MVT::iPTR, .. )) > 3) I added method addPointerRegClass() to my InstrInfo class > > The compiler generates the some code as before, but that seems to > be ok, because I haven't used ptr_rc yet. > > 4) I changed the address mode MEMri: > > def MEMri : Operand<iPTR> { > let PrintMethod = "printMemOperand"; > // was:...

...s to set just --build, not --host (which defaults > to the setting of --build) nor --target (which defaults to whatever > value --host ends up as). > > > Now the ./configure in llvm-gcc4.2 will choke badly on such a command line. > > First, it misinterprets the CC= and CXX= strings as target architecture > names, and continues to complain that it cannot configure for multiple > architectures at once. Which is why you should be setting them as env vars :) > > Second, it does not default --host or --target to --build. This is normal. Crappy, but normal. &gt...