search for: strh

Displaying 8 results from an estimated 8 matches for "strh".

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2007 Dec 02
2
Optimised qmf_synth and iir_mem16
...sh r0 add r14, r14, r5, asr #13 @ (mem[0] + 4096) >> 13 + x[i] mov r5, #0x7f00 orr r5, r5, #0xff @ r5 = 32767 cmp r14, r5 movgt r14, r5 @ Clip positive cmn r14, r5 rsblt r14, r5, #0 @ Clip negative strh r14, [r2], #2 @ Write result to y[i] ldrsh r4, [r1] ldrsh r0, [r1, #2] rsb r14,r14,#0 @ r14 = -y[i] mla r5, r4, r14,r6 @ mem[0] = mem[1] - den[0]*y[i] ldrsh r4, [r1, #4] mla r6, r0, r14,r7 @ mem[1] = mem[2] - den...
2012 Mar 28
5
plot points using circles filled half in red and half in blue.
I want to plot many points and want to use circles. The filling color depends on variable a. if a=1, then not fill if a=2 then fill with red, if a=3 then fill with blue, if a=4, fill half with red and half with blue. Can anyone tell me how to plot the case "a=4"? Thanks a lot
2013 May 24
10
[PATCH 0/4] ARM/early-printk: Improve reusability and add Calxeda support
The current early-printk support for ARM is rather hard-coded, making it hard to add machines or tweak settings. This series slightly moves some code to gather UART settings in xen/arch/arm/Rules.mk instead of the actual .c files. Also it allows two different machines with different settings to share the same driver, which the last patch exploits to add support the Calxeda Midway hardware. This
2007 Dec 12
2
Speex crashing on ARM with assembler optimization enabled.
...code for function open_loop_nbest_pitch: ... skipped... 0x40030300 <open_loop_nbest_pitch+620>: add r0, r3, r8 0x40030304 <open_loop_nbest_pitch+624>: ldrsh r3, [r0] 0x40030308 <open_loop_nbest_pitch+628>: mov r3, r3, lsl #1 0x4003030c <open_loop_nbest_pitch+632>: strh r3, [r0], #2 0x40030310 <open_loop_nbest_pitch+636>: add r6, r6, #1 ; 0x1 0x40030314 <open_loop_nbest_pitch+640>: cmp r6, r7 0x40030318 <open_loop_nbest_pitch+644>: bne 0x40030304 <open_loop_nbest_pitch+624> 0x4003031c <open_loop_nbest_pitch+648>: l...
2007 Dec 12
2
Speex crashing on ARM with assembler optimization enabled.
Hi, I'm trying to get speex working on an ARM board (ARM926EJ-Sid(wb) core, ARM 5TE architecture) and getting segfaults if build with "--enable-fixed-point --enable-arm5e-asm" options. If I use just "--enable-fixed-point", then it runs fine, but once I add "--enable-arm5e-asm" it start crashing (I use testenc to test it). Further investigation showed, that it
2013 Feb 22
48
[PATCH v3 00/46] initial arm v8 (64-bit) support
This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.
2013 Aug 08
14
[LLVMdev] [global-isel] Proposal for a global instruction selector
...t the legality of a type is a function of the type's bit size only. In other words, if f64 is a legal type, so is i64, v2f32, and even v64i1. On the ARM target, for example, these types would be legal: All 8-bit types via ldrb/strb to GPR. (i8, v1i8, v2i4, v4i2, v8i1) All 16-bit types via ldrh/strh to GPR. (i16, f16, v1i16, v2i8, ...) All 32-bit types via ldr/str to GPR and vldr/vstr to SPR. All 64-bit types via ldrd/strd to GPRPair and vldr/vstr to DPR. All 128-bit types via vld1/vst1 to DPair. All 192-bit types via vld1/vst1 to DTriple. All 256-bit types via vld1/vst1 to DQuad. This larger...
2013 Jan 23
132
[PATCH 00/45] initial arm v8 (64-bit) support
First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I