search for: strexeq

...------ main.c:9:9: error: instruction requires: thumb2 "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr ^ <inline asm>:1:2: note: instantiated into assembly here ldrex r6, [r4, #0] ^ main.c:11:3: error: instruction requires: thumb2 "strexeq %[failed], %[newValue], [%[ptr], #0]\n" ^ <inline asm>:3:1: note: instantiated into assembly here strexeq r5, lr, [r4, #0] ^ 2 errors generated. ------------------------------------------------------- In the main.c, some ARM assembly are embedded which contains instructions...

...on requires: thumb2 > "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr > ^ > <inline asm>:1:2: note: instantiated into assembly here > ldrex r6, [r4, #0] > ^ > main.c:11:3: error: instruction requires: thumb2 > "strexeq %[failed], %[newValue], [%[ptr], #0]\n" > ^ > <inline asm>:3:1: note: instantiated into assembly here > strexeq r5, lr, [r4, #0] > ^ > 2 errors generated. > ------------------------------------------------------- > > In the main.c, some ARM assembly are...

...;> "ldrex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr >> ^ >> <inline asm>:1:2: note: instantiated into assembly here >> ldrex r6, [r4, #0] >> ^ >> main.c:11:3: error: instruction requires: thumb2 >> "strexeq %[failed], %[newValue], [%[ptr], #0]\n" >> ^ >> <inline asm>:3:1: note: instantiated into assembly here >> strexeq r5, lr, [r4, #0] >> ^ >> 2 errors generated. >> ------------------------------------------------------- >> >> In th...

...drex %[oldValue], [%[ptr], #0]\n" // oldValue = *ptr >>> ^ >>> <inline asm>:1:2: note: instantiated into assembly here >>> ldrex r6, [r4, #0] >>> ^ >>> main.c:11:3: error: instruction requires: thumb2 >>> "strexeq %[failed], %[newValue], [%[ptr], #0]\n" >>> ^ >>> <inline asm>:3:1: note: instantiated into assembly here >>> strexeq r5, lr, [r4, #0] >>> ^ >>> 2 errors generated. >>> ------------------------------------------------------- &g...

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I

This patch series implements SMP boot for arch/arm, as far as getting all CPUs up and running the idle loop. Changes from v1: - moved barriers out of loop in udelay() - dropped broken GIC change in favour of explanatory comment - made the increment of ready_cpus atomic (I couldn''t move the increment to before signalling the next CPU because the PT switch has to happen between

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See