Displaying 3 results from an estimated 3 matches for "str_post_imm".
2012 Feb 04
4
[LLVMdev] ARMLoadStoreOptimizer bug
...cc <BB#23>, pred:0, pred:%CPSR<kill>
B <BB#22>
Successors according to CFG: BB#23 BB#22
# After ARMLoadStoreOptimizer:
BB#21: derived from LLVM BB %cond.end
Live Ins: %LR %R0 %R1 %R7 %R10 %R11
Predecessors according to CFG: BB#14 BB#18
%R1<def> = STR_POST_IMM %R7<kill>, %R1, %noreg, 4, pred:14,
pred:%noreg
Bcc <BB#23>, pred:0, pred:%CPSR<kill>
B <BB#22>
Successors according to CFG: BB#23 BB#22
It appears that the ARM Load/Store optimizer has rolled the ADDri and
STRi12 into the STR_POST_IMM, but has ignored t...
2012 Feb 07
0
[LLVMdev] ARMLoadStoreOptimizer bug
...kill>
> B <BB#22>
> Successors according to CFG: BB#23 BB#22
>
> # After ARMLoadStoreOptimizer:
> BB#21: derived from LLVM BB %cond.end
> Live Ins: %LR %R0 %R1 %R7 %R10 %R11
> Predecessors according to CFG: BB#14 BB#18
> %R1<def> = STR_POST_IMM %R7<kill>, %R1, %noreg, 4, pred:14, pred:%noreg
> Bcc <BB#23>, pred:0, pred:%CPSR<kill>
> B <BB#22>
> Successors according to CFG: BB#23 BB#22
>
> It appears that the ARM Load/Store optimizer has rolled the ADDri and STRi12 into the STR_PO...
2012 Feb 07
1
[LLVMdev] ARMLoadStoreOptimizer bug
...gt;
> > Successors according to CFG: BB#23 BB#22
> >
> > # After ARMLoadStoreOptimizer:
> > BB#21: derived from LLVM BB %cond.end
> > Live Ins: %LR %R0 %R1 %R7 %R10 %R11
> > Predecessors according to CFG: BB#14 BB#18
> > %R1<def> = STR_POST_IMM %R7<kill>, %R1, %noreg, 4, pred:14,
> pred:%noreg
> > Bcc <BB#23>, pred:0, pred:%CPSR<kill>
> > B <BB#22>
> > Successors according to CFG: BB#23 BB#22
> >
> > It appears that the ARM Load/Store optimizer has rolled the ADD...