Displaying 3 results from an estimated 3 matches for "storemerge8".
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storemerge
2013 Jul 05
0
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
...around) because “i”’s alloca is not in the entry block - it only works on allocas in the entry block.
opt -O3 -vectorize-loops -debug-only=loop-vectorize < test.ll
LV: Found a loop: code_block8
LV: Found an induction variable.
LV: PHI is not a poly recurrence.
LV: Found an unidentified PHI. %storemerge8 = phi i32 [ 0, %code_block8.lr.ph ], [ %next_index, %code_block8 ]
LV: Can't vectorize the instructions or CFG
LV: Not vectorizing.
IR coming into the vectorizer:
code_block8: ; preds = %code_block8.lr.ph, %code_block8
%next_index10 = phi i32 [ %i.promot...
2013 Jul 05
2
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
Le 5 juil. 2013 à 04:11, Tobias Grosser <tobias at grosser.es> a écrit :
> On 07/04/2013 01:39 PM, Stéphane Letz wrote:
>> Hi,
>>
>> Our DSL can generate C or directly generate LLVM IR. With LLVM 3.3, we can vectorize the C produced code using clang with -O3, or clang with -O1 then opt -O3 -vectorize-loops. But the same program generating LLVM IR version cannot be
2013 Jul 05
2
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
...t in the entry block - it only works on allocas in the entry block.
>
> opt -O3 -vectorize-loops -debug-only=loop-vectorize < test.ll
>
> LV: Found a loop: code_block8
> LV: Found an induction variable.
> LV: PHI is not a poly recurrence.
> LV: Found an unidentified PHI. %storemerge8 = phi i32 [ 0, %code_block8.lr.ph ], [ %next_index, %code_block8 ]
> LV: Can't vectorize the instructions or CFG
> LV: Not vectorizing.
>
> IR coming into the vectorizer:
>
> code_block8: ; preds = %code_block8.lr.ph, %code_block8
> %...