Displaying 1 result from an estimated 1 matches for "store0_to_p4".
2016 Nov 09
10
Is the correct behavior of getelementptr i192* for opt + llc -march=aarch64?
Hi all,
opt and opt + llc generate the difference aarch64 asm code for the following LLVM code.
Is it intended behavior?
I expected (A) because I cast %p from i192* to i64*.
The information is dropped by opt and 8-byte padding is inserted or I write a bad code?
% cat a.ll
define void @store0_to_p4(i192* %p)
{
%p1 = bitcast i192* %p to i64*
%p2 = getelementptr i64, i64* %p1, i64 3
%p3 = getelementptr i64, i64* %p2, i64 1
store i64 0, i64* %p3
ret void
}
% llc-3.8 a.ll -O3 -o - -march=aarch64
store0_to_p4:
str xzr, [x0, #32] ; (A)
ret
% opt-3.8 -O3 a.ll -o - | llc-3.8 -O3 -...