search for: stibp

Displaying 6 results from an estimated 6 matches for "stibp".

2020 Sep 14
0
Re: [ovirt-users] Re: Testing ovirt 4.4.1 Nested KVM on Skylake-client (core i5) does not work
...<feature policy="require" name="clflushopt"/> > > <feature policy="require" name="umip"/> > > <feature policy="require" name="md-clear"/> > > <feature policy="require" name="stibp"/> > > <feature policy="require" name="arch-capabilities"/> > > <feature policy="require" name="ssbd"/> > > <feature policy="require" name="xsaves"/> > > <feature policy=...
2018 Sep 30
1
libvirt reported capabilities doesn't match /proc/cpuinfo while the model does match
...call nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm cpuid_fault epb pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms xsaveopt dtherm ida arat pln pts flush_l1d bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf This results on my cpu being detected, if I allow host copy, as AMD chip and the guest becomes unbearably slow. The model of t...
2019 Jun 12
1
Speculative attack mitigations
...est ssse3 cx16 sse4_1 sse4_2 popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm fsgsbase erms xsaveopt dtherm ida arat pln pts bugs : cpu_meltdown spectre_v1 spectre_v2 spec_store_bypass l1tf mds You will note that there is a lack of flags for ssbd, spec_ctrl, intel_stibp, flush_l1d, ibrs, etc. # for i in /sys/devices/system/cpu/vulnerabilities/* ; do echo -n "$i : "; cat $i ; done /sys/devices/system/cpu/vulnerabilities/l1tf : Mitigation: PTE Inversion /sys/devices/system/cpu/vulnerabilities/mds : Vulnerable: Clear CPU buffers attempted, no microcode; SM...
2019 Sep 18
1
Live-Migration not possible: error: operation failed: guest CPU doesn't match specification
Hi, i have atwo node HA-cluster with pacemaker, corosync, libvirt and KVM. Recently i configured a new VirtualDomain which runs fine, but live Migration does not succeed. This is the error: VirtualDomain(vm_snipanalysis)[14322]: 2019/09/18_16:56:54 ERROR: snipanalysis: live migration to ha-idg-2 failed: 1 Sep 18 16:56:54 [6970] ha-idg-1 lrmd: notice: operation_finished:
2019 Dec 26
2
(no subject)
...ant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid xsaveopt dtherm ida arat pln pts md_clear flush_l1d cpufreq *-pci description: Host bridge product: Haswell-ULT DRAM Controller vendor: Intel Corporation physical...
2020 Jan 12
2
Display broken after resume from suspend
...e V2 : Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch [ 0.132048] Spectre V2 : Enabling Restricted Speculation for firmware calls [ 0.132050] Spectre V2 : mitigation: Enabling conditional Indirect Branch Prediction Barrier [ 0.132050] Spectre V2 : User space: Mitigation: STIBP via seccomp and prctl [ 0.132052] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl and seccomp [ 0.132055] MDS: Vulnerable: Clear CPU buffers attempted, no microcode [ 0.132220] Freeing SMP alternatives memory: 36K [ 0.244929] smpboot: CPU0: Intel(R) Cor...