search for: sti_sasg_codec

Displaying 4 results from an estimated 4 matches for "sti_sasg_codec".

2016 Aug 26
0
[PATCH v8 16/18] ARM: DT: STi: stihxxx-b2120: Add DT nodes for STi audio card
...0.dtsi +++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi @@ -131,5 +131,50 @@ dvb-card = <STV0367_TDA18212_NIMA_1>; }; }; + + sti_uni_player2: sti-uni-player at 2 { + status = "okay"; + }; + + sti_uni_player3: sti-uni-player at 3 { + status = "okay"; + }; + + sti_sasg_codec: sti-sasg-codec { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif_out>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "sti audio card"; + status = "okay"; + +...
2016 Aug 26
0
[PATCH v8 13/18] ARM: STi: DT: STiH407: Add sti-sasg-codec dt node
...y.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 45cab30..d1258d5 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -873,5 +873,12 @@ <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, <&clk_s_c0_flexgen CLK_EXT2F_A9>; }; + + sti_sasg_codec: sti-sasg-codec { + compatible = "st,stih407-sas-codec"; + #sound-dai-cells = <1>; + status = "disabled"; + st,syscfg = <&syscfg_core>; + }; }; }; -- 1.9.1
2016 Aug 26
32
[PATCH v8 00/18] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite
2016 Aug 26
32
[PATCH v8 00/18] Add support for FDMA DMA controller and slim core rproc found on STi chipsets
Hi Vinod, Bjorn, Patrice, This patchset adds support for the Flexible Direct Memory Access (FDMA) core found on STi chipsets from STMicroelectronics. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller supporting 16 independent channels and data can be moved from memory to memory or between memory and paced latency critical real time targets. After quite