search for: stgrun

...ell with EABI libs as Haskell code is using them too. For registerised GHC build there are two important functions provided in GHC's RTS written in C (or gcc inline asm compiled by gcc still using platform ABI) which performs important task of bridging C world ABI and GHC own ABI. It's StgRun and StgReturn. StgRun calls Haskell (STG) function from the C world and StgReturn return from the Haskell world into C world again safely. They are defined in rts/StgCRun.c and the comment from the top of the file might be more useful here than my writing about it: * STG-to-C glue. * * T...

On 29 June 2012 17:46, Karel Gardas <karel.gardas at centrum.cz> wrote: > Yes and no. Shortly: original GHC/ARM/LLVM port was done by Stephen on > ARMv5/Qemu IIRC. I've later added whole VFP support and ARMv7 support. The > code in GHC is properly #ifdefed, so if there is no VFP available on pre > ARMv6, then it's not used. ie. GHC STG floating points regs are then >

Hi Renato, On 06/25/12 12:13 AM, Renato Golin wrote: > Hi Karel, > > I understand this patch has already been merged (to 3.0), so don't > take my question as stopping the merge to head, I'm just making sure I > got it right... The rest looks correct. > > + CCIfType<[v2f64], CCAssignToReg<[Q4, Q5]>>, > + CCIfType<[f64], CCAssignToReg<[D8, D9,

Hi Tim, thanks for the swift response! @debug is defined in the same module, which makes this all the more confusing. The target information from the working example are: target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "armv6kz--linux-gnueabihf" from the ghc produced module: target datalayout =

...ons > and the SIGILL happens after susccessfuly running a bunch of other arm > instructions. From GDB: > > Program received signal SIGILL, Illegal instruction. > 0x03ff9dbc in stg_ap_v_fast () > (gdb) bt > #0 0x03ff9dbc in stg_ap_v_fast () > #1 0x03fc6ce6 in StgRun (f=0x3ff9db4 <stg_ap_v_fast>, basereg=0x49d2090 <MainCapability+16>) at > rts/StgCRun.c:81 > #2 0x03fca52a in schedule (initialCapability=0x49d2080 <MainCapability>, task=0x49e62c0) at > rts/Schedule.c:524 > #3 0x03fcc5e6 in scheduleWaitThread (ts...

Hi all, I do a little work on the Glasgow Haskell Compiler (GHC) which uses LLVM for the backend when compiling for Arm and some other targets. The reason I am posting to this list is that a GHC compiled program (using the LLVM backend) is getting an illegal instruction exception on the this instruction: ldr r0, [r0] According to the Arm archtecture manual: