Displaying 3 results from an estimated 3 matches for "start_macroblock".
2012 Apr 21
0
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
Hi Akira,
> I am running into a problem when I turn on post-RA scheduler with mode
> "ANTIDEP_CRITICAL" for mips.
> I'd appreciate if someone could explain what is going wrong here.
All these passes are pretty sensitive to correct register liveness
information. As a first step I'd check whether machine verifier
reports no errors here.
--
With best regards, Anton
2012 Apr 25
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
...error messages are printed because the verifier does
not understand that mips has delay slots, not because it has detected any
true violations.
$ llc macroblock.llvm.mips64el.ll -mcpu=mips64r2 -O3 -o macroblock.s
-mattr=n64 -verify-machineinstrs
# After PreEmit passes
# Machine code for function start_macroblock: Post SSA
BB#0: derived from LLVM BB %entry
Live Ins: %A0_64 %T9_64 %RA_64 %S3_64 %S2_64 %S1_64 %S0_64
BEQ %A0<kill>, %ZERO, <BB#2>
NOP
Successors according to CFG: BB#2 BB#1
# End machine code for function start_macroblock.
*** Bad machine code: MBB exits via uncondi...
2012 Apr 20
2
[LLVMdev] CriticalAntiDepBreaker rewrites a register operand of a call instruction
I am running into a problem when I turn on post-RA scheduler with mode
"ANTIDEP_CRITICAL" for mips.
I'd appreciate if someone could explain what is going wrong here.
This is the basic block before post RA scheduling (at
PostRASchedulerList.cpp:322):
*(gdb)
#3 0x0000000000ed3d26 in runOnMachineFunction (this=0x20aa470, Fn=...)
at lib/CodeGen/PostRASchedulerList.cpp:322
322