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...or? We can avoid > this issue by allowing a super-project or package manager build LLVM > and pass its path to both Clang and CompilerRT. > > > Regarding the use of just-built-clang for both building CompilerRT and > running its test suite, please consider relaxing that to a > stage0-clang for building and a just-built-clang for testing. What if we don't have stage0-clang, and use gcc as a host compiler? > Using > the just-built-clang to build compiler-rt is rough on package > managers. You're basically stating that the compiler-rt build depends > on s...

I was trying to build llvm + clang with cmake cache PGO.cmake and ninja stage2. I used the 4.0.0 final tag vfrom svn. This seems to work for me. I added libcxx, libcxxabi, llld etc. And now I get the following cmake error. -- Performing Test LIBCXX_SUPPORTS_STD_EQ_CXX11_FLAG -- Performing Test LIBCXX_SUPPORTS_STD_EQ_CXX11_FLAG - Failed CMake Error at projects/libcxx/CMakeLists.txt:396

On Thu, Mar 20, 2014 at 10:12 PM, Greg Fitzgerald <garious at gmail.com> wrote: > > ExternalProject_Add(compiler-rt ...) > > So that was quite the experiment. Looking at > clang/runtime/CMakeLists.txt, I'm not seeing a lot of bang for buck > here, and it looks like this file is prone to bit rot. Could you please elaborate on this? In fact, I don't plan to give

...rst epilog block after the kernel is going to have instructions scheduled in the last stage only, then the next epilog block, if needed, will have instructions from LastStage-1 first, then the LastStage. Let’s say we have instructions x, y, z, that are scheduled in different iterations/stage, x in stage0, y in stage1, and z in stage2, and x generates a value used by y, which generates a value used by z. The generated code will look like: Prolog 0 (this block ends with a conditional jump to Epilog 0): X Prolog 1 (this block ends with a conditional jump to Epilog 1): Y X Kernel: Z, Y, X Epilo...

Hi James: Personally, I like the idea of refactoring and more abstraction, But unfortunately, I don't know enough about the edges cases either. BTW: the prototype is still causing quite some Asseertions in PowerPC - some nodes are not generated in correct order. Best, Jinsong Ji (纪金松), PhD. XL/LLVM on Power Compiler Development E-mail: jji at us.ibm.com From: James Molloy <james at

...re is no difference in the pipeline description, because the units are fully pipelined and we don't need to express latency here. (I'm only showing the pipeline stages here, not the operand latency list). Let's say you want to treat each stage of a pipeline as a separate type of unit: stage0: Decode stage1: Exec stage2: Write [InstrStage<1, [Decode0, Decode1], 0>, InstrStage<1, [Exec0, Exec1], 0>, InstrStage<1, [Write0, Write1, 0]>] Now when the first instruction is scheduled, it fills in the current row of the reservation table with Decode0, Exec0, Write0. This i...

Hi everyone, 9.0.0-rc1 was just tagged from the release_90 branch at r367217 (tagged as llvmorg-9.0.0-rc1 in the Git monorepo). Source code and docs are available at https://prereleases.llvm.org/9.0.0/#rc1 Binaries will be added as they become available. Please file bug reports for any issues you find as blockers of https://llvm.org/PR42474 Release testers: please start your engines, run the