search for: stackification

...Assembly does not have registers to allocate. We use virtual registers instead of physical registers because the value stack can contain an unbounded number of values. In order to fit this modeling, I need a new virtual register to be allocated for each def of the generalized call instruction. The stackification passes in the WebAssembly backend will correctly interpret this as the call's return values being pushed onto the value stack. The other option I am considering would be to lower calls to contain a chain of glued pseudo nodes that each explicitly defs a single register, the collapsing that cha...

...using > the llvm register allocators and just run you own custom stackifier > pass instead. After reading <http://www.llvm.org/docs/CodeGenerator.html#regAlloc_ssaDecon> is correct to say that if I don't use an existing LLVM register allocation pass, that I would need to do my stackification directly on the SSA form? Could/should I still reuse parts like the PHIElimination pass? It sounded sort of like this was very coupled with the register allocators. I'm was initial sort of thinking that for a first (unoptimized) cut I might be able to just use the "simple" built-...

...makes sense. I can see that in a normal register machine, implicitly defs must be physical registers. In a stack machine like WebAssembly, though, implicit defs are known to be pushed onto the value stack just like any other defs. Slots on the value stack are represented by virtual registers until stackification, so for WebAssembly we do need the implicit defs to be stored in virtual registers. I guess the best thing to do for now would be to add a bit to the MCInstrDesc carrying this information. Thomas On Mon, Nov 18, 2019 at 6:53 PM Quentin Colombet <qcolombet at apple.com> wrote: > Hi Thoma...

...ers to allocate. We use > virtual registers instead of physical registers because the value stack can > contain an unbounded number of values. > > In order to fit this modeling, I need a new virtual register to be > allocated for each def of the generalized call instruction. The > stackification passes in the WebAssembly backend will correctly interpret > this as the call's return values being pushed onto the value stack. > > The other option I am considering would be to lower calls to contain a > chain of glued pseudo nodes that each explicitly defs a single register, >...

On Feb 22, 2009, at 5:43 PM, Wesley J. Landaker wrote: > > I would love to see a Kalescope-like tutorial that goes step-by-step > through > making a backend. At the very least, I'll be documenting my > adventure, so > maybe once I know what I'm doing I can turn it into a tutorial. Have you seen: http://llvm.org/docs/WritingAnLLVMBackend.html If you're targeting

Hi, I'm trying to have another stab at writing an LLVM ZPU backend. Any pointers or encouragement would be greatly appreciated. So far I've been wandering around the LLVM trying to read up and I've hacked together something that builds just to experiment and get a feel for the build system. I was able to write a backend for GCC which has been in use for years now, but I can't

> We mean ZPU looks like x86 fp stack. We handle it by register > allocating it like a normal register based cpu than add a x87 > stackifer pass to convert it to stack operations. Thanks! > You do not have to. Take a look at PPC and ARM branch fix up passes. > llvm backends compute exact length of instructions so it can determine > when it is necessary to convert a conditional

On Fri, 20 Jun 2008, [ISO-8859-1] ?yvind Harboe wrote: >> The ZPU has two instructions that I'd also like to use. These instructions >> can push a value from deeper down on the stack and also pop a value >> from the stack and store them deeper down on the stack. > > Sounds like the Intel X87 floating point stack, which we support. GCC does as well. Supporting floating

On Sunday 22 February 2009 17:06:06 Eli Friedman wrote: > On Sun, Feb 22, 2009 at 3:25 PM, Wesley J. Landaker <wjl at icecavern.net> wrote: > > * Has anyone else out there targeted (or tried to target) a stack > > machine before? Was it successfull? What problems did you have? > > Haven't done that, and I don't think there are any existing backends > like

Hi all, I need to figure out why InstrEmitter::EmitMachineNode assumes that when the number of outputs of a MachineSDNode is greater than the number of defs in the corresponding MCInstrDesc, the outputs in the difference will be placed into physical registers as opposed to virtual registers. The specific line in question is: bool HasPhysRegOuts = NumResults > NumDefs &&