Displaying 10 results from an estimated 10 matches for "stackif".
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stacki8
2019 Nov 19
2
Question about physical registers in ISel
...s not in memory and not addressable, so it is not the same
as the normal stack of call frames, which we also have. Instead, the value
stack takes the place of registers. The way we model the value stack is by
using virtual registers exclusively in the MachineInst layer, then
rearranging (i.e. "stackifying") the instructions and removing all
registers entirely right before lowering to MC. We skip register allocation
entirely, since WebAssembly does not have registers to allocate. We use
virtual registers instead of physical registers because the value stack can
contain an unbounded number of...
2009 Feb 23
1
[LLVMdev] Creating an LLVM backend for a very small stack machine
...utorial is so
amazingly easy to work through that it makes me jealous for a similar
tutorial on the backend. But I'm definitely not complaining. =)
> If you're targeting a stack machine, I'd strongly recommend not using
> the llvm register allocators and just run you own custom stackifier
> pass instead.
After reading
<http://www.llvm.org/docs/CodeGenerator.html#regAlloc_ssaDecon> is correct
to say that if I don't use an existing LLVM register allocation pass, that
I would need to do my stackification directly on the SSA form?
Could/should I still reuse parts...
2019 Nov 19
2
Question about physical registers in ISel
...makes sense. I can see that in a normal register
machine, implicitly defs must be physical registers. In a stack machine
like WebAssembly, though, implicit defs are known to be pushed onto the
value stack just like any other defs. Slots on the value stack are
represented by virtual registers until stackification, so for WebAssembly
we do need the implicit defs to be stored in virtual registers. I guess the
best thing to do for now would be to add a bit to the MCInstrDesc carrying
this information.
Thomas
On Mon, Nov 18, 2019 at 6:53 PM Quentin Colombet <qcolombet at apple.com>
wrote:
> H...
2019 Nov 20
2
Question about physical registers in ISel
...not addressable, so it is not the same
> as the normal stack of call frames, which we also have. Instead, the value
> stack takes the place of registers. The way we model the value stack is by
> using virtual registers exclusively in the MachineInst layer, then
> rearranging (i.e. "stackifying") the instructions and removing all
> registers entirely right before lowering to MC. We skip register allocation
> entirely, since WebAssembly does not have registers to allocate. We use
> virtual registers instead of physical registers because the value stack can
> contain an...
2009 Feb 23
0
[LLVMdev] Creating an LLVM backend for a very small stack machine
...g my
> adventure, so
> maybe once I know what I'm doing I can turn it into a tutorial.
Have you seen:
http://llvm.org/docs/WritingAnLLVMBackend.html
If you're targeting a stack machine, I'd strongly recommend not using
the llvm register allocators and just run you own custom stackifier
pass instead.
-Chris
2010 Nov 18
0
[LLVMdev] Writing a backend for the ZPU
...ke LLVM better
by far in terms of the actual code and how it's put together, even
if my understanding is very superficial.
The advice I've gotten so far on this list is to use normal registers
before register allocation and then switch to stack slots after
register allocation much like x86 stackifer, using two sets of
instructions.
http://lists.cs.uiuc.edu/pipermail/llvmdev/2008-November/018621.html
http://lists.cs.uiuc.edu/pipermail/llvmdev/2008-June/015430.html
Work-in-progress git repository:
http://repo.or.cz/w/llvm/zpu.git
Some thoughts/problems:
- In GCC I created registers which...
2008 Jun 23
0
[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU
> We mean ZPU looks like x86 fp stack. We handle it by register
> allocating it like a normal register based cpu than add a x87
> stackifer pass to convert it to stack operations.
Thanks!
> You do not have to. Take a look at PPC and ARM branch fix up passes.
> llvm backends compute exact length of instructions so it can determine
> when it is necessary to convert a conditional branch to a conditional
> branch of the opp...
2008 Jun 22
1
[LLVMdev] Backend for the ZPU - a stack based / zero operand CPU
On Fri, 20 Jun 2008, [ISO-8859-1] ?yvind Harboe wrote:
>> The ZPU has two instructions that I'd also like to use. These instructions
>> can push a value from deeper down on the stack and also pop a value
>> from the stack and store them deeper down on the stack.
>
> Sounds like the Intel X87 floating point stack, which we support.
GCC does as well. Supporting floating
2009 Feb 23
2
[LLVMdev] Creating an LLVM backend for a very small stack machine
On Sunday 22 February 2009 17:06:06 Eli Friedman wrote:
> On Sun, Feb 22, 2009 at 3:25 PM, Wesley J. Landaker <wjl at icecavern.net>
wrote:
> > * Has anyone else out there targeted (or tried to target) a stack
> > machine before? Was it successfull? What problems did you have?
>
> Haven't done that, and I don't think there are any existing backends
> like
2019 Nov 19
2
Question about physical registers in ISel
Hi all,
I need to figure out why InstrEmitter::EmitMachineNode assumes that when
the number of outputs of a MachineSDNode is greater than the number of defs
in the corresponding MCInstrDesc, the outputs in the difference will be
placed into physical registers as opposed to virtual registers.
The specific line in question is:
bool HasPhysRegOuts = NumResults > NumDefs &&