search for: stack_type_unknown

Displaying 7 results from an estimated 7 matches for "stack_type_unknown".

2020 Aug 31
1
[PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler
...ack. > + */ > + sp = eregs->sp; > + stack = (unsigned long *)sp; > + get_stack_info_noinstr(stack, current, &info); > + > + /* > + * Don't sync to entry stack or other unknown stacks - use the fall-back > + * stack instead. > + */ > + if (info.type == STACK_TYPE_UNKNOWN || info.type == STACK_TYPE_ENTRY || AFAICT, that STACK_TYPE_UNKNOWN gets set only by the plain get_stack_info() function - not by the _noinstr() variant so you'd need to check the return value of latter... > + info.type >= STACK_TYPE_EXCEPTION_LAST) > + sp = __this_cpu_ist_top_v...
2020 Aug 24
0
[PATCH v6 47/76] x86/dumpstack/64: Add noinstr version of get_stack_info()
...known; -recursion_check: /* * Make sure we don't iterate through any given stack more than once. * If it comes up a second time then there's something wrong going on: @@ -196,4 +202,5 @@ int get_stack_info(unsigned long *stack, struct task_struct *task, unknown: info->type = STACK_TYPE_UNKNOWN; return -EINVAL; + } diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c index 770b613790b3..f5e1e60c9095 100644 --- a/arch/x86/mm/cpu_entry_area.c +++ b/arch/x86/mm/cpu_entry_area.c @@ -21,7 +21,8 @@ DEFINE_PER_CPU(struct cea_exception_stacks*, cea_exception_stacks); DECLA...
2020 Aug 24
0
[PATCH v6 48/76] x86/entry/64: Add entry code for #VC handler
...* + * Check whether entry happened from a safe stack. + */ + sp = eregs->sp; + stack = (unsigned long *)sp; + get_stack_info_noinstr(stack, current, &info); + + /* + * Don't sync to entry stack or other unknown stacks - use the fall-back + * stack instead. + */ + if (info.type == STACK_TYPE_UNKNOWN || info.type == STACK_TYPE_ENTRY || + info.type >= STACK_TYPE_EXCEPTION_LAST) + sp = __this_cpu_ist_top_va(VC2); + +sync: + /* + * Found a safe stack - switch to it as if the entry didn't happen via + * IST stack. The code below only copies pt_regs, the real switch happens + * in ass...
2020 Aug 24
96
[PATCH v6 00/76] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is the new version of the SEV-ES client enabling patch-set. It is based on the latest tip/master branch and contains the necessary changes. In particular those ar: - Enabling CR4.FSGSBASE early on supported processors so that early #VC exceptions on APs can be handled. - Add another patch (patch 1) to fix a KVM frame-size build
2020 Jul 24
86
[PATCH v5 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is a rebased version of the latest SEV-ES patches. They are now based on latest tip/master instead of upstream Linux and include the necessary changes. Changes to v4 are in particular: - Moved early IDT setup code to idt.c, because the idt_descr and the idt_table are now static - This required to make stack protector work early (or
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into
2020 Jul 14
92
[PATCH v4 00/75] x86: SEV-ES Guest Support
From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into