Displaying 3 results from an estimated 3 matches for "st_desc_base".
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get_desc_base
2016 Oct 24
2
Instruction selection confusion at register - chooses vector register instead of scalar one
...d load instructions in the style of Mips MSA - see
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/Mips/MipsMSAInstrInfo.td, look
for "def ST_D", etc.
Note however that my vector unit has a separate memory space. This is why I defined
the vector store like:
class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, RegisterOperand ROWD,
Operand MemOpnd = uimm4_ptr, ImmLeaf Addr = immLeafAlex,
InstrItinClass itin = NoItinerary> {
dag OutOperandList = (outs);
dag InOperan...
2016 Oct 25
0
Instruction selection confusion at register - chooses vector register instead of scalar one
...and load instructions in the style of Mips MSA - see
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/Mips/MipsMSAInstrInfo.td, look
for "def ST_D", etc.
Note however that my vector unit has a separate memory space. This is why I defined
the vector store like:
class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
ValueType TyNode, RegisterOperand ROWD,
Operand MemOpnd = uimm4_ptr, ImmLeaf Addr = immLeafAlex,
InstrItinClass itin = NoItinerary> {
dag OutOperandList = (outs);
dag InOperan...
2016 Mar 18
2
Immediate operand for load instruction, in back end
Hello,
I'm trying to define in my new back end, in MyBackendInstrInfo.td file, a vector load
instruction that takes an immediate address operand. (I got inspired from Mips' MSA SIMD
extensions.)
Could you please tell me what's the right way to do it?
Here, the load class has $addrsrc which is a relative address with base a certain
register and offset:
class