Displaying 4 results from an estimated 4 matches for "st16".
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2017 Oct 13
2
[SelectionDAG] Assertion due to MachineMemOperand flags difference.
...64<1>, Constant:i64<64>
t42: v4i32,ch = load<LD16[%0+64](align=8)(dereferenceable)> t20, t41, undef:i64
t46: i64 = add FrameIndex:i64<1>, Constant:i64<80>
t47: v4i32,ch = load<LD16[%0+80](align=8)(dereferenceable)> t20, t46, undef:i64
t25: ch = store<ST16[%1]> t20, t24, FrameIndex:i64<0>, undef:i64
t29: i64 = add FrameIndex:i64<0>, Constant:i64<16>
t30: ch = store<ST16[%1+16]> t20, t28, t29, undef:i64
t33: i64 = add FrameIndex:i64<0>, Constant:i64<32>
t34: ch = store<ST16[%1+32]> t20,...
2017 Mar 14
3
llvm-stress crash
...machine verifier.
A 128 bit register
%vreg233:subreg_l32<def,read-undef> = LLCRMux %vreg119;
GR128Bit:%vreg233 GRX32Bit:%vreg119
gets spilled:
%vreg265:subreg_l32<def,read-undef> = LLCRMux %vreg119;
GR128Bit:%vreg265 GRX32Bit:%vreg119
ST128 %vreg265, <fi#10>, 0, %noreg; mem:ST16[FixedStack10](align=8)
GR128Bit:%vreg265
-> regalloc
%R5L<def> = LLCRMux %R6L, %R4Q<imp-def>
ST128 %R4Q<kill>, <fi#10>, 0, %noreg; mem:ST16[FixedStack10](align=8)
-> pseudo expansion
%R5L<def> = LLCR %R6L
STG %R4D<kill>, %R15D, 200, %noreg; mem:ST16[Fi...
2016 Mar 10
2
Greedy register allocator allocates live sub-register
...ed:%noreg, 5; VRF128:%vreg302 VRF64_l:%vreg270
* bar 30, %vreg302; VRF128:%vreg302
6768B %vreg304<def,tied1> = foo %vreg304<tied0>, %vreg263, 14, pred:1,
pred:%noreg, 5; VRF128:%vreg304 VRF64_l:%vreg263
* bar 30, %vreg304; VRF128:%vreg304
6776B STORE128 %vreg302, <fi#32>, 0; mem:ST16[FixedStack32] VRF128:%vreg302
6792B %vreg306<def> = COPY %vreg305; VRF128:%vreg306,%vreg305
6796B %vreg375<def> = LOAD_v4i16 <fi#64>, 0, pred:1, pred:%noreg, 7;
mem:LD8[FixedStack64] VRF64_l:%vreg375
6800B %vreg306<def,tied1> = foo %vreg306<tied0>, %vreg375, 14, pred:1...
2016 Mar 15
3
how to type-legalize a dag
...RD=8]
0x3ea46e8: <multiple use>
0x3ea48f8: <multiple use>
0x3ea4a00: v4i32 = add 0x3ea46e8, 0x3ea48f8 [ORD=7]
0x3ea4b08: i32 = FrameIndex<0>
0x3ea45e0: <multiple use>
0x3ea4d18: ch = store 0x3ea4c10, 0x3ea4a00, 0x3ea4b08,
0x3ea45e0<ST16[%z](align=4)> [ORD=8]
0x3ea4e20: <multiple use>
0x3ea44d8: i32 = Constant<0>
0x3ea4f28: ch,glue = CopyToReg 0x3ea4d18, 0x3ea4e20, 0x3ea44d8 [ORD=9]
0x3ea4f28: <multiple use>
0x3ea4e20: <multiple use>
0x3ea4f28: <multiple use>
0x3ea5030: ch...