search for: ssi

Hi Fernando, Thanks for the very clear explanation. Fernando Magno Quintao Pereira wrote: > simulation: it does not add instructions to LLVM IR. Instead, it builds an > interval representation for each variable. Each interval represents a > variable in SSI form, and will be associated to one or more constraints, > like v > 10, or v > a.length. A query will have to find the variable, > O(1), and then its interval, O(ln #intervals). > > transformation: it replaces a variable with new variables that have the > SSI property. In th...

Dear All, Perhaps a related issue is whether SSI form is valuable for other transformations or analysis passes. If it is, then it might be worth building general SSA->SSI and SSI->SSA transforms so that any LLVM pass wishing to have the code in SSI form can do so. -- John T. Nicolas Geoffray wrote: > [snip] > > OK. Is it poss...

...ter Science master student at UFMG, Brasil. I'm interested in > taking part on Google Summer of Codes 2009. My idea is not on the LLVM list, > but I have written a project description to make my intentions clear. My > project is attached as a pdf file. By changing LLVM IR from SSA to SSI, you propose to make a non-backwards-compatible change which will break all existing passes, optimizers, analyses, as well as instruction selectors and register allocations. It's particularly troublesome because the SSI sigma instruction defines multiple variables, whereas the SSA form instruc...

...I have written a project description to make my intentions clear. My project is attached as a pdf file. Regards, -- Andre Tavares Master Student in Computer Science - UFMG - Brasil http://dcc.ufmg.br/~andrelct -------------- next part -------------- A non-text attachment was scrubbed... Name: SSI.pdf Type: application/pdf Size: 117132 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090327/8be0658a/attachment.pdf>

...tudent at UFMG, Brasil. I'm interested in >> taking part on Google Summer of Codes 2009. My idea is not on the LLVM list, >> but I have written a project description to make my intentions clear. My >> project is attached as a pdf file. > > By changing LLVM IR from SSA to SSI, you propose to make a > non-backwards-compatible change which will break all existing passes, > optimizers, analyses, as well as instruction selectors and register > allocations.  It's particularly troublesome because the SSI sigma > instruction defines multiple variables, whereas...

There is some redundancy at the instruction format level in the x86 .td files. For example, in X86InstrFormats.td: // SSE1 Instruction Templates: // // SSI - SSE1 instructions with XS prefix. class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern> : I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>; // SSE3 Instruction Templates: // S3SI - SSE3 instructions with XSrefix. cl...

...e of the summer of coders working on LLVM this year. My project is to implement the ABCD algorithm for array bounds checking, and also a bitwidth analysis that maps variables to an approximation of its size in bits. To implement this, I will have to simulate a intermediate representation called SSI (Static Single Information) form on top of LLVM SSA representation. The SSI form has the property that each use of a variable post-dominates its definition. Also, if there are two uses of the same variable, say, u(v1) and u(v2), then, either u(v1) dominates u(v2) or vice-versa. I would like to...

...____________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > > Thanks for all answers. I will consider them all before I start coding. I have another discussion that I would like to hear from you. I can implement SSI in two different ways. Analysis or Transformation Pass. As an Analysis Pass, I would create a SSI LiveInterval, mapping each interval with a constraint. Pros: No change to the IR. Cons: It is a simulation. As an Transformation Pass, SSI...

...ran compiler: g77 Fortran symbols: double_underscore C profiling: yes C++ profiling: yes Fortran profiling: yes C++ exceptions: no Thread support: yes ROMIO support: yes IMPI support: no Debug support: no Purify clean: no SSI boot: globus (API v1.1, Module v0.6) SSI boot: rsh (API v1.1, Module v1.1) SSI boot: slurm (API v1.1, Module v1.0) SSI coll: lam_basic (API v1.1, Module v7.1) SSI coll: shmem (API v1.1, Module v1.0) SSI coll: smp (API v1.1, Module v1.2)...

...his project. Let me add my two cents: > I don't get it. What is the cons then of a simulation? The tradeoff, IMHO, is as follows: simulation: it does not add instructions to LLVM IR. Instead, it builds an interval representation for each variable. Each interval represents a variable in SSI form, and will be associated to one or more constraints, like v > 10, or v > a.length. A query will have to find the variable, O(1), and then its interval, O(ln #intervals). transformation: it replaces a variable with new variables that have the SSI property. In this case, it must add cop...

On May 19, 2009, at 8:15 PM, Nick Lewycky wrote: > Eli Friedman wrote: >> On Tue, May 19, 2009 at 12:30 PM, Nicolas Geoffray >> <nicolas.geoffray at lip6.fr> wrote: >>>> The pi functions can be implemented with copy instructions. >>> Store instructions? >> >> I would assume something more like "select i1 true, <ty> %val, <ty>

...ed if a comparator was used in the terminator of its parent BasicBlock. This is wrong because a comparator can be created in a BasicBlock and used in the terminator of other BasicBlock, and can be used in more than one. Patch attached Andre Tavares wrote: > I did a bunch of modifications on SSI. Most of them to make it faster, > and a few inconsistencies I found. I will list what I did. > > 1. We had a function isUsedInTerminator that tested if a comparator > was used in the terminator of its parent BasicBlock. This is wrong > because a comparator can be created in a Bas...

On Monday 30 March 2009 16:12, David Greene wrote: > There is some redundancy at the instruction format level in the x86 .td > files. For example, in X86InstrFormats.td: > > // SSE1 Instruction Templates: > // > // SSI - SSE1 instructions with XS prefix. > > class SSI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> > pattern> > > : I<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE1]>; > > // SSE3 Instruction Templates: > // S3SI...

On 13-12-12 13:20, Max Horn wrote: > On 13.12.2012, at 03:57, Conrad Parker wrote: >> IIRC the xiph sites use server-side includes (apache SSI) for headers >> and footers. [...] >> > Yay, yet another version of the website :-). > > I am not really a fan of SSI myself, but if this is what is there, and people are familiar with it, I think it should also do just fine. I really had something like this in mind when I ask...

Hi Andre? Andre Tavares wrote: > Thanks for all answers. I will consider them all before I start coding. > > I have another discussion that I would like to hear from you. > > I can implement SSI in two different ways. Analysis or Transformation Pass. > > As an Analysis Pass, I would create a SSI LiveInterval, mapping each > interval with a constraint. > Pros: No change to the IR. > Cons: It is a simulation....

...I'm working on a project for Google Summer of Code, to implement the ABCD and Bitwidth analysis in LLVM. I'm not going to extend the description of the project here, this link shows my proposal http://homepages.dcc.ufmg.br/~andrelct/projects/gsoc_2009/proposal. I have been in some discussions on this list about Ada and SSI that helped on my decisions up to this moment. This project is due to August, and during this period I will be posting my progress in a blog. If someone has interest in following my progress I welcome you to read the blog, and I would really appreciate any sug...

I have 2 ADSL ad1 and ad2 , one PC for my firewall and some deamon on it with 3 ethernet : eth0 connect to my LAN ( 192.168.60.0/24 ) and 2 other connect to ad1 and ad2 |eth1 (10.0.1.2)--------------------ad1 ( ADSL 1 ) | My LAN(192.168.60.0/24) |---------eth0( 192.168.60.2)--> PC | |eth2 (10.0.2.2)---------------------ad2 (ADSL 2 ) All computer in LAN has default router =

Hi We have applied the routing patches from http://www.ssi.bg/%7Eja/#routes. To 2.6.15 this seems to have broken our output natting. Has anyone else experienced this or any advice on how to fix. Is this working on the newer kernel i.e. 2.6.19 ? Any help would be appreciated. -- Tim Haak email: tim@haak.co.uk cel: 0837787100 First love is only a li...

...oject for Google Summer of Code, to implement the > ABCD and Bitwidth analysis in LLVM. I'm not going to extend the > description of the project here, this link shows my proposal > http://homepages.dcc.ufmg.br/~andrelct/projects/gsoc_2009/proposal. > > I have been in some discussions on this list about Ada and SSI that > helped on my decisions up to this moment. > > This project is due to August, and during this period I will be posting > my progress in a blog. If someone has interest in following my progress > I welcome you to read the blog, and I would re...

...ill having some problems with grasping the basic concepts though. How do I include a common html snippet in some of my views? (The snippet exists in two different flavors, I want to include either one depending on what type of user (admin/others) is requesting the page) I have tried the normal SSI include tags, but my WEBrick server cant handle them properly (at all). // Daniel -- Posted via http://www.ruby-forum.com/.