Displaying 4 results from an estimated 4 matches for "sreg0".
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vreg0
2012 Apr 19
2
[LLVMdev] Tablegen to match a literal in an instruction
...List = outs;
dag InOperandList = ins;
ILOpCode operation = op;
let Pattern = pattern;
let AsmString = !strconcat(asmstr, "\n");
bit hasIEEEFlag = 0;
bit hasZeroOpFlag = 0;
}
class BinaryOp<ILOpCode op, SDNode OpNode, RegisterClass dReg,
RegisterClass sReg0, RegisterClass sReg1>
: ILFormat<op, (outs dReg:$dst), (ins sReg0:$src0, sReg1:$src1),
!strconcat(op.Text, " $dst, $src0, $src1"),
[(set dReg:$dst, (OpNode sReg0:$src0, sReg1:$src1))]>;
multiclass BinaryOpMCInt<ILOpCode OpCode, SDNode OpNode> {
def _i8...
2012 Apr 19
3
[LLVMdev] Tablegen to match a literal in an instruction
...List = outs;
dag InOperandList = ins;
ILOpCode operation = op;
let Pattern = pattern;
let AsmString = !strconcat(asmstr, "\n");
bit hasIEEEFlag = 0;
bit hasZeroOpFlag = 0;
}
class BinaryOp<ILOpCode op, SDNode OpNode, RegisterClass dReg,
RegisterClass sReg0, RegisterClass sReg1>
: ILFormat<op, (outs dReg:$dst), (ins sReg0:$src0, sReg1:$src1),
!strconcat(op.Text, " $dst, $src0, $src1"),
[(set dReg:$dst, (OpNode sReg0:$src0, sReg1:$src1))]>;
multiclass BinaryOpMCInt<ILOpCode OpCode, SDNode OpNode> {
def _i8...
2012 Apr 19
0
[LLVMdev] Tablegen to match a literal in an instruction
...s;
> ILOpCode operation = op;
> let Pattern = pattern;
> let AsmString = !strconcat(asmstr, "\n");
> bit hasIEEEFlag = 0;
> bit hasZeroOpFlag = 0;
> }
> class BinaryOp<ILOpCode op, SDNode OpNode, RegisterClass dReg,
> RegisterClass sReg0, RegisterClass sReg1>
> : ILFormat<op, (outs dReg:$dst), (ins sReg0:$src0, sReg1:$src1),
> !strconcat(op.Text, " $dst, $src0, $src1"),
> [(set dReg:$dst, (OpNode sReg0:$src0, sReg1:$src1))]>;
> multiclass BinaryOpMCInt<ILOpCode OpCode, SDNode OpNo...
2012 Apr 19
0
[LLVMdev] Tablegen to match a literal in an instruction
...s;
> ILOpCode operation = op;
> let Pattern = pattern;
> let AsmString = !strconcat(asmstr, "\n");
> bit hasIEEEFlag = 0;
> bit hasZeroOpFlag = 0;
> }
> class BinaryOp<ILOpCode op, SDNode OpNode, RegisterClass dReg,
> RegisterClass sReg0, RegisterClass sReg1>
> : ILFormat<op, (outs dReg:$dst), (ins sReg0:$src0, sReg1:$src1),
> !strconcat(op.Text, " $dst, $src0, $src1"),
> [(set dReg:$dst, (OpNode sReg0:$src0, sReg1:$src1))]>;
> multiclass BinaryOpMCInt<ILOpCode OpCode, SDNode OpNo...