search for: sreejita

...age of C. It reads @A in a register , @B , reads A and B and directly writes into the memory @C. There are shift operators as well that are also performed in a similar way, loads, stores are also performed like this. So I am trying to define this resistive majority instruction in my ISA. Thanks! -Sreejita On Sun, Jun 4, 2017 at 8:22 PM, Sean Silva <chisophugis at gmail.com> wrote: > I'm having a hard time grasping what this ISA actually looks like. > > When you say that it has a single instruction that is a majority function, > I assume something like this: > > MAJ rDs...

...can i create a selection DAG node in the backend instruction info itself? If so then how? I was thinking of creation of a new Selection DAG node and mapping all the other instructions like loads, stores as pseudo instructions and breaking them up. Can someone please help me with this? Thanks! Sreejita -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170603/b8a7ef8c/attachment.html>

...ny way to implement this without creating a new Selection DAG node for the majority operation? I was thinking of creation of a new Selection DAG node and mapping all the other instructions like loads, stores as pseudo instructions and breaking them up. Can someone please help me with this? Thanks! Sreejita Sent from Mail for Windows 10 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170601/2fd71477/attachment-0001.html>