Displaying 2 results from an estimated 2 matches for "srcvselectfalse".
2017 Mar 07
2
Specifying conditional blocks for the back end
...teInstruction(), which is employed also in IfConversion.cpp.
More exactly I'm trying to use a pseudo-instruction that will get translated to a
sequence of 4 MachineInstr, namely:
// These 4 instructions replace the pseudo-instruction I use for LLVM's VSELECT
R31 = OR srcVselectFalse, srcVselectFalse
WHEREEQ
R31 = OR srcVselectTrue, srcVselectTrue
ENDWHERE
I plan to do this as early as possible, in a pass registered in addInstSelector()
normally, which gets executed immediately after the first scheduling phase.
If anybody sees a problem...
2017 Mar 03
2
Specifying conditional blocks for the back end
Hello.
For my back end for the Connex SIMD research processor I want to implement
conditional blocks (I guess the better term is predicated blocks). Predicated blocks are
bordered by two instructions WHEREEQ (or WHERELT, etc) and ENDWHERE.
For example, the following code executes the instructions inside the WHERE block only
for the lanes where R0 == R1:
EQ R0, R1;