Displaying 5 results from an estimated 5 matches for "srcvalue1".
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2015 Feb 23
2
[LLVMdev] Eliminating redundant loads
...store double %7, double* %destvalue, align 8
%srctype = getelementptr inbounds %ravi.TValue* %5, i64 0, i32 1
%desttype = getelementptr inbounds %ravi.TValue* %6, i64 0, i32 1
%8 = load i32* %srctype, align 4
store i32 %8, i32* %desttype, align 4
%9 = load %ravi.TValue** %base, align 8
%srcvalue1 = getelementptr inbounds %ravi.TValue* %5, i64 1, i32 0, i32 0
%destvalue2 = getelementptr inbounds %ravi.TValue* %9, i64 1, i32 0, i32 0
%10 = load double* %srcvalue1, align 8
store double %10, double* %destvalue2, align 8
Regards
Dibyendu
2015 Feb 23
2
[LLVMdev] Eliminating redundant loads
...avi.TValue* %5, i32 0, i32 1
%desttype = getelementptr inbounds %ravi.TValue* %6, i32 0, i32 1
%8 = load i32* %srctype
store i32 %8, i32* %desttype
%9 = load %ravi.TValue** %base
%10 = getelementptr inbounds %ravi.TValue* %9, i32 1
%11 = getelementptr inbounds %ravi.TValue* %5, i32 1
%srcvalue1 = getelementptr inbounds %ravi.TValue* %11, i32 0, i32 0, i32 0
%destvalue2 = getelementptr inbounds %ravi.TValue* %10, i32 0, i32 0, i32 0
%12 = load double* %srcvalue1
store double %12, double* %destvalue2
%srctype3 = getelementptr inbounds %ravi.TValue* %11, i32 0, i32 1
%desttype4 = g...
2015 Feb 22
2
[LLVMdev] Eliminating redundant loads
On 22 February 2015 at 20:58, David Jones <djones at xtreme-eda.com> wrote:
> Not sure if this is your problem, but it was mine:
>
> You must create (or obtain) a DataLayout *and install it into the Module*.
>
> It is possible to generate machine code for IR and not install the
> DataLayout into the Module. Rather, the DataLayout is used locally at the
> point where code
2015 Feb 23
3
[LLVMdev] Eliminating redundant loads
On 23 February 2015 at 01:29, Kamal Sharma <kgs1.rice at gmail.com> wrote:
> Hi Dibyendu,
>
> It would be very helpful if you could post the original source code or
> snippet.
> That way, one can investigate deeper to understand the problem.
>
> Regards,
> Kamal Sharma
>
Hi Kamal,
Sure. I guess I ought to create a test that one can look in isolation.
I am
2006 Dec 19
3
[LLVMdev] alias-aware scheduling
...antPoolSDNode>(Base) ||
+ isa<GlobalAddressSDNode>(Base);
+ }
+
+ /* FIXME: copied from DAGCombiner.cpp */
+ /// isAlias - Return true if there is any possibility that the two addresses
+ /// overlap.
+ bool isAlias(SDOperand Ptr1, int64_t Size1,
+ const Value *SrcValue1, int SrcValueOffset1,
+ SDOperand Ptr2, int64_t Size2,
+ const Value *SrcValue2, int SrcValueOffset2)
+ {
+ // If they are the same then they must be aliases.
+ if (Ptr1 == Ptr2) return true;
+
+ // Gather base node and offset information.
+ SDOperand Base...