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...tiple results, such as buildUnmerge, but in that case I would probably change these to a SmallVectorImpl out argument. Another minor issue I’ve run into is when trying to add convenience functions with constants (e.g. shift creation with materializing the amount constant). With an overload using a SrcOp constructible from “unsigned”, and one using an integer type, the wrong one gets called and ends up creating a constant with the value of the register. I think this is more a symptom of using a plain unsigned for registers, but fixing this longstanding mistake everywhere would be a very large proje...

...tiple results, such as buildUnmerge, but in that case I would probably change these to a SmallVectorImpl out argument. Another minor issue I’ve run into is when trying to add convenience functions with constants (e.g. shift creation with materializing the amount constant). With an overload using a SrcOp constructible from “unsigned”, and one using an integer type, the wrong one gets called and ends up creating a constant with the value of the register. I think this is more a symptom of using a plain unsigned for registers, but fixing this longstanding mistake everywhere would be a very large proje...

On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote: > Can you explain why you chose the approach of using a new pass? > I pictured removing LegalizeDAG's type legalization code would > mostly consist of finding all the places that use TLI.getTypeAction > and just deleting code for handling its Expand and Promote. Are you > anticipating something more

On May 20, 2009, at 1:34 PM, Eli Friedman wrote: > On Wed, May 20, 2009 at 1:19 PM, Eli Friedman > <eli.friedman at gmail.com> wrote: > >> Per subject, this patch adding an additional pass to handle vector >> >> operations; the idea is that this allows removing the code from >> >> LegalizeDAG that handles illegal types, which should be a significant

...HS); LegalizeSetCCCondCode(VT, LHS, RHS, CC, dl); } SDValue ExpandLibCall(RTLIB::Libcall LC, SDNode *Node, bool isSigned, SDValue &Hi); - SDValue ExpandIntToFP(bool isSigned, MVT DestTy, SDValue Source, DebugLoc dl); SDValue EmitStackConvert(SDValue SrcOp, MVT SlotVT, MVT DestVT, DebugLoc dl); SDValue ExpandBUILD_VECTOR(SDNode *Node); @@ -306,12 +165,7 @@ SDValue ExpandBSWAP(SDValue Op, DebugLoc dl); SDValue ExpandBitCount(unsigned Opc, SDValue Op, DebugLoc dl); - bool ExpandShift(unsigned Opc, SDValue Op, SDValue Amt, -...